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| 型號(hào)： | HV7131B |
| 廠商： | Electronic Theatre Controls, Inc. |
| 英文描述： | CMOS IMAGE SENSOR With 8-bit ADC |
| 中文描述： | CMOS圖像傳感器的8位ADC |
| 文件頁數(shù)： | 13/29頁 |
| 文件大小： | 834K |
| 代理商： | HV7131B |
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HV7131B
Electronics Industries Co., Ltd.
System IC Division
CMOS IMAGE SENSOR
With 8-bit ADC
This document is a general product description and is subject to change without notice. Hyundai Electronics does not assume any
responsibility for use of circuits described. NO patent licenses are implied.
DA31991011R_1.0 - 13 - 1999 Hyundai System IC Division
PRELIMINARY
TIMING CONTROL REGISTERS
l
HSYNC blank register[8’h20-8’h21]
The HSYNC Blank register defines data blank time between current line and next line by pixel clock unit.
The value programmed to HSYNC blank register defines HSYNC Low Time with (Sensor Array Width –
Window Width) clocks added. For example, if Window Width = 500, HSYNC Blank = 10, then HSYNC
Low Time is HSYNC Blank + (Sensor Array Width – Window Width), 10 + (648 – 500) = 158 clocks.
For more timing details, refer to Frame Timing Diagram section.
l
VSYNC blank register[8’h22-8’h23]
The VSYNC blank register defines the active high duration of VSYNC output by pixel clock unit.
The active high VSYNC indicates frame boundary between continuous frames. For VSYNC-HSYNC
timing relation in the frame transition, please refer to Frame Timing Diagram section.
l
Integration time value register[8’h25-8’h27]
Integration time value register defines the time during which active pixel element evaluates photon
energy that is converted to digital data output by internal ADC processing. Integration time is equivalent
to exposure time in general camera so that integration time need to be increased in dark environment
and decreased in light environment. Integration time unit is selected between pixel unit and line unit by
MODE_B[0] bit. When line unit mode is selected, only two lower bytes of Integration time value
register[8’h26-8’h27] are accounted in the internal sensor logic because representable maximum
integration time, Maximum Value(2
16
-1) * Sensor Array Width(648) * Clock Period(100ns for 10Mhz) =
4.246 sec, is quite big enough to adapt to any very dark environment. For pixel unit mode, whole three
bytes value are used for integration time, Integration Time Value(8’ h25-8’ h27) * Clock Period, and
representable maximum value is Maximum Value(2
24
-1) * Clock Period(100ns for 10Mhz) = 1.677sec.
Sensor Array Width(648)
Window Width(500)
Sensor Array Width(648)
Window Width(500)
HSYNC Low Time(158)
HSYNC Blank(10)
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| HV7131GP | CMOS Image Sensor with Image Signal Processing |
| HV7131RP | CMOS Image Sensor with Image Signal Processing |
| HV7131E1 | CMOS IMAGE SENSOR With 8-bit ADC |
| HV7131D-COB | CMOS IMAGE SENSOR With 8-bit ADC |
| HV7131D-COF | CMOS IMAGE SENSOR With 8-bit ADC |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| HV7131D | 制造商:HYNIX 制造商全稱:Hynix Semiconductor 功能描述:CMOS IMAGE SENSOR With 8-bit ADC |
| HV7131D-COB | 制造商:HYNIX 制造商全稱:Hynix Semiconductor 功能描述:CMOS IMAGE SENSOR With 8-bit ADC |
| HV7131D-COF | 制造商:HYNIX 制造商全稱:Hynix Semiconductor 功能描述:CMOS IMAGE SENSOR With 8-bit ADC |
| HV7131E1 | 制造商:HYNIX 制造商全稱:Hynix Semiconductor 功能描述:CMOS IMAGE SENSOR With 8-bit ADC |
| HV7131GP | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:CMOS Image Sensor with Image Signal Processing |
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