參數(shù)資料
型號: HV513WG
廠商: SUPERTEX INC
元件分類: 外設(shè)及接口
英文描述: High Voltage 8-Channel Serial to Parallel Converters
中文描述: SIPO BASED PRPHL DRVR, PDSO24
封裝: SOW-24
文件頁數(shù): 1/6頁
文件大?。?/td> 118K
代理商: HV513WG
1
HV513
HV513
8-Channel Serial to Parallel Converter
with High Voltage Push-Pull Outputs,
POL, Hi-Z, and Short Circuit Detect
02/11/02
Supertex Inc. does not recommend the use of its products in life support applications and will not knowingly sell its products for use in such applications unless it receives an adequate "products liability
indemnification insurance agreement." Supertex does not assume responsibility for use of devices described and limits its liability to the replacement of devices determined to be defective due to
workmanship. No responsibility is assumed for possible omissions or inaccuracies. Circuitry and specifications are subject to change without notice. For the latest product specifications, refer to the
Supertex website: http://www.supertex.com. For complete liability information on all Supertex products, refer to the most current databook or to the Legal/Disclaimer page on the Supertex website.
Applications
Piezoelectric transducer driver
Weaving applications
Braille
Printers
MEMs
Displays
General Description
The HV513 is a low voltage serial to high voltage parallel
converter with 8 high voltage push-pull outputs. This device has
been designed to drive small capacitve loads such as piezoelec-
tric transducers. It can also be used in any application requiring
multiple high voltage outputs, with medium current source and
sink capabilities.
The device consists of an 8-bit shift register, 8 latches, and
control logic to perform the polarity select and blanking of the
outputs. Data is shifted through the shift register on the low to
high transition of the clock. A data output buffer is provided for
cascading devices. Operation of the shift register is not affected
by the /LE, /BL, /POL, or the /HI-Z control inputs. Transfer of data
from the shift register to the latch occurs when the /LE is high.
The data in the latch is stored when /LE is low. A high-Z, /HI-Z,
pin is provided to set all the outputs in a high-Z state.
All outputs have short circuit protection that detects if the outputs
have reached the required output state. If output does not track
the required state, then the /SHORT pin will be low. This output
will pulse low during the output transistion period under normal
operation; see SC Timing Diagram for details.
All outputs will have a break-before-make circuitry to reduce
cross-over current during output state changes.
Note: All logic control inputs have internal 20k-ohm pull-up
resistors.
Features
HVCMOS technology
Operating output voltage of 250V
Low power level shifting from 5V to 250V
Shift register speed 8MHz @ V
DD
=5V
8 latch data outputs
Output polarity and blanking
CMOS compatible inputs
Output short circuit detect
Output high-Z control
8
8
O
L
8
8
8
V
DD
V
PP
D
IN
CLK
D
OUT
GND
LE*
BL*
POL*
Hi-Z*
HV
OUT
1
HV
OUT
8
Short*
Top Block Diagram
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