參數(shù)資料
型號(hào): HV430
廠商: ELAN Microelctronics Corp .
英文描述: High Voltage Ring Generator(工作電壓325V,高壓振鈴發(fā)生器)
中文描述: 高壓環(huán)發(fā)生器(工作電壓325V,高壓振鈴發(fā)生器)
文件頁(yè)數(shù): 8/8頁(yè)
文件大小: 47K
代理商: HV430
8
Pin Description
V
PP1
Positive high voltage supply.
V
PP2
Positive gate voltage supply.
Generated by an internal linear regulator.
A 25V, 100nF capacitor should be
connected between V
PP2
and V
PP1
.
V
NN1
Negative high voltage supply.
V
NN2
Negative gate voltage supply.
Generated by an internal linear regulator.
A 25V, 100nF capacitor should be
connected between V
NN2
and V
NN1
.
V
DD
Logic supply voltage.
SGnd
Low voltage logic ground.
PGnd
High voltage power ground.
P
IN
Logic control input.
When mode is high, logic input high turns ON the external high voltage P-channel MOSFET.
Internally pulled low.
N
IN
Logic control input.
When mode is high, logic input high turns ON the external high voltage N-channel MOSFET.
Internally pulled low.
ENABLE
Logic enable input.
Logic high enables IC.
Internally pulled low.
MODE
Logic mode input.
0=single-control; 1=dual-control.
When MODE is high, N
IN
and P
IN
independently control N
OUT
and P
OUT
, respectively.
When MODE is low, N
IN
controls both outputs in a complementary manner.
(See Truth Table)
FAULT
Logic output.
Fault is at logic low when either current limit sense pin, V
Psen
or V
Nsen
, is activated.
Remains
active until overcurrent condition clears or ENABLE=0 or RESET=0.
RESET
Power-on reset. A capacitor connected between this pin and ground determines the delay time between application
of V
DD
and when the device outputs are enabled.
Low leakage tantalum recommended.
DEADBAND
A resistor between this pin and ground sets the
break-before-make
time between output transitions.
Applicable
only in single-control mode.
For minimum deadtime, a 5.6k
resistor to ground should be used.
For dual-input
mode, tie to Vdd.
V
Pgate
Gate drive for external P-channel MOSFET.
V
Ngate
Gate drive for external N-channel MOSFET.
V
Psen
Pulse by pulse over current sensing for P-Channel MOSFET.
V
Nsen
Pulse by pulse over current sensing for N-Channel MOSFET.
Pin Configuration
1
10
2
3
4
5
6
7
8
9
20
11
19
18
17
16
15
14
13
12
top view
SOW 20
V
DD
Fault
Mode
P
IN
N
IN
Enable
Reset
Deadband
SGND
PGND
V
PP2
V
PP1
V
PSEN
V
PGATE
N/C
N/C
V
NGATE
V
NSEN
V
NN1
V
NN2
HV430
1235 Bordeaux Drive, Sunnyvale, CA 94089
TEL: (408) 744-0100
FAX: (408) 222-4895
www.supertex.com
09/21/00
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