參數(shù)資料
型號： HTSMOH5601EV
廠商： NXP SEMICONDUCTORS
元件分類： 通信及網(wǎng)絡(luò)
英文描述： HITAG S transponder IC
中文描述： SPECIALTY TELECOM CIRCUIT, UUC
封裝： MOA2
文件頁數(shù)： 15/21頁
文件大小： 162K
代理商： HTSMOH5601EV
HTSICH56_48_SDS
All information provided in this document is subject to legal disclaimers.
NXP B.V. 2011. All rights reserved.
Product short data sheet
COMPANY PUBLIC
Rev. 3.0 — 12 October 2011
210330
15 of 21
NXP Semiconductors
HTSICH56; HTSICH48
HITAG S transponder IC
7.5.9
WRITE BLOCK
After transmitting the WRITE BLOCK command, the Page address PADR (8 Bits) within a
Block and the 8 bit Cyclic Redundancy Check (CRC 8), the HITAG S Transponder
responds with the SOF and an acknowledge (ACK) to confirm the reception of a correct
WRITE BLOCK command. After the waiting time t
wsc
the RWD transmits the write data
with CRC 8 Page by Page (1 to 4 Pages depending on the Page address PADR within the
corresponding block). After the programming time t
prog
the HITAG S Transponder
responds with a SOF and an acknowledge to confirm correct programming of each Page.
7.5.10
QUITE
With this command a Selected HITAG S Transponder can be entered into the Quiet State.
Table 14.
WRITE BLOCK
MSB
LSB
MSB
LSB
RWD:
1 0 0 1
PADR
CRC 8
EOF
t
wsc
ACK
01
Transponder
t
wresp
SOF
Table 15.
Write data for page with page address: PADR
LSByte
MSB
LSB MSB
DATA 0
DATA 1
MSByte
LSB MSB
LSB MSB
LSB MSB
LSB
RWD:
DATA 2
DATA 3
CRC 8
EOF
t
wsc
ACK
01
Transponder:
t
prog
SOF
Table 16.
Write data for page with page address: PADR + 1
LSByte
MSB
LSB MSB
DATA 0
DATA 1
MSByte
LSB MSB
LSB MSB
LSB MSB
LSB
RWD:
DATA 2
DATA 3
CRC 8
EOF
t
wsc
ACK
01
Transponder
t
prog
SOF
Table 17.
Write data for page with page address: PADR + 2
LSByte
MSB
LSB MSB
DATA 0
DATA 1
MSByte
LSB MSB
LSB MSB
LSB MSB
LSB
RWD:
DATA 2
DATA 3
CRC 8
EOF
t
wsc
ACK
01
Transponder
t
prog
SOF
Table 18.
Write data for page with page address: PADR + 3
LSByte
MSB
LSB MSB
DATA 0
DATA 1
MSByte
LSB MSB
LSB MSB
LSB MSB
LSB
RWD:
DATA 2
DATA 3
CRC 8
EOF
ACK
01
Transponder
t
prog
SOF
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