HT95C200/20P/300/30P
Rev. 0.10
24
October 1, 2002
Preliminary
The DTMF pin output is controlled by the combination of the D_PWDN, TONE, TR~TC value.
Control Register Bits
DTMF Pin Output Status
D_PWDN
TONE
TR4~TR1/TC4~TC1
1
x
x
0
0
0
x
1/2 VDD
0
1
0
1/2 VDD
0
1
Any valid value
16 dual tones or 8 signal tones, bias with 1/2 VDD
Register
Label
Bits
R/W
Function
DTMFC
(20H)
D_PWDN
0
RW
DTMF generator power down
1: DTMF generator is at power down mode.
0: DTMF generator is at operation mode.
1
RO
Unused bit, read as 0
TONE
2
RW
Tone output enable
1: DTMF signal output is enabled.
0: DTMF signal output is disabled.
BMSK
3
RW
Burst-cycle interrupt mask
1: No interrupt will occur when 1 burst-cycle is finished.
0: An interrupt will occur when 1 burst-cycle is finished.
This flag is functional only at Burst-mode
.
BURST
4
RW
Burst-mode bit
1: Enable Burst-mode.
0: Disable Burst-mode.
5
RO
Unused bit, read as 0
BURSTF
6
RW
Burst-cycle interrupt flag
1: One burst-cycle is finished.
0: No burst-cycle is finished.
This flag is set by hardware and cleared by software.
This flag is functional only at Burst-mode.
7
RO
Unused bit, read as 0
DTMFD
(21H)
TC4~TC1
3~0
RW
To set high group frequency
TR4~TR1
7~4
RW
To set low group frequency
The DTMF generator supports two output modes,
namely Tone-Mode and Burst-Mode.
Tone-Mode: (D_PWDN=0, TONE=1 and BURST=0).
The duration of Tone-Mode output should be handled
by the software.
DTMFD register value could be changed as desired,
the DTMF pin will output the new dual-tone simulta-
neously.
BMSK and BURSTF flags are not necessary.
Any time set BURST flag to 1, the DTMF output mode
will be changed to Burst-Mode, and Burst-Cycle is
starting.
Burst-Mode: (D_PWDN=0, TONE=1 and BURST=1).
The timing of Burst-Mode output is controlled by hard-
ware.
How to start the Burst-Mode
At Tone-Mode, set BURST flag to 1.
If D_PWDN flag=0 & TONE flag=0, set BURST
flag=1, then set TONE flag=1.
If D_PWDN flag=1, set BURST flag & TONE flag=1,
then clear D_PWDN flag=0.
The burst-cycle processing:
Step1:DTMFpinautomaticallygeneratesDTMFtone
(determinedbytheTC~TRregistervalue)for82.5ms.
Step 2: DTMF pin automatically generates 1/2 VDD
for 85.5ms.
Step 3: After the 85.5ms timeout, the TC~TR value is
cleared to 0 by hardware.
Step 4: One burst-cycle is finished. The DTMF
burst-cycle interrupt is generated.
Step 5: Jump to Step 1 for the next burst-cycle.