Functional Description
HT82K95EE/HT82K95AE
Rev. 1.20
6
August 28, 2006
Execution Flow
The system clock for the microcontroller is derived from
a crystal. The system clock is internally divided into four
non-overlapping clocks. One instruction cycle consists
of four system clock cycles.
Instruction fetching and execution are pipelined in such
a way that a fetch takes an instruction cycle while de-
coding and execution takes the next instruction cycle.
However, the pipelining scheme allows each instruction
to be effectively executed in a cycle. If an instruction
changestheprogramcounter,twocyclesarerequiredto
complete the instruction.
Program Counter
PC
The program counter (PC) controls the sequence in
which the instructions stored in the program ROM are
executed and its contents specify a full range of pro-
gram memory.
After accessing a program memory word to fetch an in-
struction code, the contents of the program counter are
incrementedbyone.Theprogramcounterthenpointsto
the memory word containing the next instruction code.
When executing a jump instruction, conditional skip ex-
ecution, loading PCL register, subroutine call or return
from subroutine, initial reset, internal interrupt, external
interrupt or return from interrupts, the PC manipulates
the program transfer by loading the address corre-
sponding to each instruction.
The conditional skip is activated by instructions. Once
the condition is met, the next instruction, fetched during
the current instruction execution, is discarded and a
dummy cycle replaces it to get the proper instruction.
Otherwise proceed to the next instruction.
The lower byte of the program counter (PCL) is a read-
able and writeable register (06H). Moving data into the
PCL performs a short jump. The destination will be
within the current program ROM page.
When a control transfer takes place, an additional
dummy cycle is required.
5
*
5
*
5
*
8
$ (
( 9
:
;
(
( 9
4 :
8
$ (
( 9
3
:
;
(
( 9
:
8
$ (
( 9
3
:
;
(
( 9
3
:
3
3
!
(
,
<
( 9
(
, :
Execution Flow
Mode
Program Counter
*11
*10
*9
*8
*7
*6
*5
*4
*3
*2
*1
*0
Initial reset
0
0
0
0
0
0
0
0
0
0
0
0
USB interrupt
0
0
0
0
0
0
0
0
0
1
0
0
Timer/Event Counter 0 overflow
0
0
0
0
0
0
0
0
1
0
0
0
Timer/Event Counter 1 overflow
0
0
0
0
0
0
0
0
1
1
0
0
Skip
Program Counter+2
Loading PCL
*11
*10
*9
*8
@7
@6
@5
@4
@3
@2
@1
@0
Jump, call branch
#11
#10
#9
#8
#7
#6
#5
#4
#3
#2
#1
#0
Return from subroutine
S11
S10
S9
S8
S7
S6
S5
S4
S3
S2
S1
S0
Program Counter
Note: *11~*0: Program counter bits
S11~S0: Stack register bits
#11~#0: Instruction code bits
@7~@0: PCL bits