
HT47C20L
12
January 18, 2000
maining space before the 40H are reserved for
future expanded usage and reading these loca-
tion will return the result 00H. The general pur-
pose data memory, addressed from 40H to 7FH,
isusedfordataandcontrolinformationunderin-
struction command.
All data memory areas can handle arithmetic,
logic,increment,decrementandrotateoperations.
Except for some dedicated bits, each bit in the
data memory can be set and reset by the SET
[m].i and CLR [m].i instruction, respectively.
They are also indirectly accessible through mem-
ory pointer registers (MP0;01H, MP1;03H).
Indirect addressing register
Location 00H and 02H are indirect addressing
registers that are not physically implemented.
Any read/write operation of [00H] and [02H] ac-
cess data memory pointed to by MP0 (01H) and
MP1 (03H) respectively. Reading location 00H
or 02H indirectly will return the result 00H.
Writing indirectly results in no operation.
The function of data movement between two in-
direct addressing registers are not supported.
The memory pointer registers, MP0 and MP1,
are both 8-bit registers which can be used to ac-
cess the data memory by combining corre-
sponding indirect addressing registers.
MP0 only can be applied to data memory, while
MP1 can be applied to data memory and LCD
display memory.
Accumulator
The accumulator is closely related to ALU oper-
ations. It is also mapped to location 05H of the
data memory and is capable of carrying out im-
mediatedataoperations.Thedatamovement be-
tween two data memory locations must pass
through the accumulator.
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RAM mapping (bank 0)