參數(shù)資料
型號(hào): HT23C020
廠商: Holtek Semiconductor Inc.
英文描述: CMOS 256K x 8-Bit Mask ROM(CMOS 256K x 8位掩模式ROM)
中文描述: 的CMOS 256K × 8位掩模ROM的CMOS(256K × 8位掩模式光盤)
文件頁數(shù): 5/8頁
文件大?。?/td> 261K
代理商: HT23C020
A.C. test conditions
Output load: see figure right
Input rise and fall time: 10ns
Input pulse levels: 0.4V to 2.4V
Input and output timing reference levels:
0.8V and 2.0V (V
CC
=5V), 1.5V (V
CC
=3V)
Timing Diagrams
Propagation delay due to address (CE /CE /OE 1/OE 1, CE 1/CE 1/OE 2/OE 2
and OE /OE are active)
Propagation delay due to chip and output enable (address valid)
Functional Description
The HT23C020 has two modes, namely data
read mode and standby mode, controlled by
CE /CE /OE 1/OE 1,CE 1/CE 1/OE 2/OE 2/NC and
OE /OE /NC inputs.
Standby mode
The HT23C020 has lower current consumption,
controlled by the chip enable input (CE/CE and
CE1/CE1). When a low/high level is applied to
the CE/CE or CE1/CE1 input, regardless of the
output enable (OE/OE/NC) states, the chip will
enter the standby mode.
Data read mode
When both the chip enable (CE /CE /OE 1/OE 1,
CE 1/CE 1/OE 2/OE 2/NC) and the output en-
able (OE /OE /NC) are active, the chip is in
data read mode. Otherwise, active CE /CE ,
CE 1/CE 1 and inactive OE /OE /NC result in
deselect mode. The output will remain in Hi-Z
state.
Output load circuit
HT23C020
5
21st Aug ’98
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