參數(shù)資料
型號: HSP45116AVC-52Z
廠商: Intersil
文件頁數(shù): 6/19頁
文件大?。?/td> 0K
描述: IC OSC NCO 52MHZ 160-MQFP
標準包裝: 24
類型: 數(shù)控振蕩器(NCO)
頻率: 52MHz
電源電壓: 4.75 V ~ 5.25 V
電流 - 電源: 184mA
工作溫度: 0°C ~ 70°C
封裝/外殼: 160-BQFP
包裝: 托盤
供應商設備封裝: 160-MQFP(28x28)
安裝類型: 表面貼裝
14
FN4156.4
May 7, 2007
Applications
The NCOM can be used for Amplitude, Phase and
Frequency modulation, as well as in variations and
combinations of these techniques, such as QAM. It is most
effective in applications requiring multiplication of a rotating
complex sinusoid by an external vector. These include AM
and QAM modulators and digital receivers. The NCOM
implements AM and QAM modulation on a single chip, and
is a element in demodulation, where it performs complex
down conversion. It can be combined with the Intersil
HSP43220 Decimating Digital Filter to form the front end of a
digital receiver.
Modulation/Demodulation
Figure 4 shows a block diagram of an AM modulator. In this
example, the phase increment for the carrier frequency is
loaded into the Center Frequency Register, and the
modulating input is clocked into the real input of the CMAC,
with the imaginary input set to 0. The modulated output is
obtained at the real output of the CMAC. With a sixteen bit,
two’s complement signal input, the output will be a 16-bit real
number, on ROUT0-15 (with OUTMUX = 00).
FIGURE 4. AMPLITUDE MODULATION
CLK
NCOM
MODULATED OUTPUT
PFCS
32
CENTER
FREQ
UEN
CY
SIN
16
S
INE
/C
OS
INE
GENE
RA
T
O
R
CMAC
RIN
SIGNAL INPUT
16
RO
16
D/A
XMTR
LO
By replacing the real input with a complex vector, a similar
setup can generate QAM signals (Figure 5). In this case, the
carrier frequency is loaded into the Center Frequency
Register as before, but the modulating vector now carries
both amplitude and phase information. Since the input vector
and the internally generated sine and cosine waves are both
16 bits, the number of states is only limited by the
characteristics of the transmission medium and by the
analog electronics in the transmitter and receiver.
The phase and amplitude resolution for the Sine/Cosine
Section (16-bit output), delivers a spectral purity of greater
than 90dBc. This means that the unwanted spectral
components due to phase uncertainty (phase noise) will be
greater than 90dB below the desired output (dBc, decibels
below the carrier). With a 32-bit phase accumulator in the
Phase/Frequency Control Section, the frequency tuning
resolution equals the clock frequency divided by 232. For
example, a 25MHz clock gives a tuning resolution of
0.006Hz.
FIGURE 5. QUADRATURE AMPLITUDE MODULATION (QAM)
CLK
NCOM
PFCS
32
CENTER
FREQ
UEN
CY
SI
N
E
/C
O
S
IN
E
GENERA
T
O
R
CMAC
RO
16
D/A
RIN
16
IMIN
16
XMTR
LO
16
The NCOM also works with the HSP43220 Decimating
Digital Filter to implement down conversion and low pass
filtering in a digital receiver (Figure 6). The NCOM performs
complex down conversion on the wideband input signal by
multiplying the input vector and the internally generated
complex sinusoid. The resulting signal has components at
twice the center frequency and at DC. Two HSP43220s, one
each on the real and imaginary outputs of the HSP45116A,
perform low pass filtering and decimation on the down
converted data, resulting in a complex baseband signal.
FIGURE 6. CHANNELIZED RECEIVER CHIP SET
HSP43220
DDF
HSP45116A
NCOM
COS (wt)
SIN (wt)
SAMPLED
INPUT
DATA
0
10MHz
DDF
OUTPUT
NCOM
OUTPUT
INPUT
0
20MHz
0
HSP45116A
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