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Rev. A.2 - J uly., 2004
HPW 7095/ A
2
Copyright
HIPAC Semiconductor, Inc.
www.hipacsemi.com
HPW7095/A
Package Code
QD : LQFP QB : TQFN
Temp. Range
E : -30 to 85 C
Handling Code
TY : Tray
Lead Free Code
L : Lead Free Device Blank : Original Device
XXXXX - Date Code
Handling Code
Temp. Range
Package Code
HPW7095 QD/QB :
HPW7095
XXXXX
HPW7095A QD/QB :
HPW7095A
XXXXX
XXXXX - Date Code
Lead Free Code
Ordering and Marking I nformation
Pinouts
35
34
33
32
31
30
29
28
27
26
25
4
4
4
4
4
4
4
4
4
3
3
3
1
1
1
1
1
1
1
2
2
2
2
2
HPW7095/A
1
2
3
4
5
6
7
8
9
10
11
12
36
SWOUT
CIN6
O
O
O
O
O
P
O
P
O
O
O
P
FB2
DTC2
IN1
FB1
DTC1
RT
CT
VB
IN3
FB3
DTC3
IN2
C
C
C
C
C
V
C
G
V
C
D
I
SWIN
FB6
IN6
DTC5
FB5
IN5
INA4
OUTA4
FB4
IN4
Pin Description
PIN
No.
1
2
3
4
Name
SW OUT
SW IN
FB6
IN6
I/O
DESCRIPTION
O
I
O
I
Output Switch Control Circuit Output Pin.
Output Switch Control Circuit Input Pin.
CH6 Error Amplifier Output Pin.
CH6 Inverted Input Pin of Error Amplifier.
CH6 Soft-Start Capacitor Connection Pin.
Leave this pin “Open” to disable the soft-start function.
CH5 Dead Time Control Pin.
Connect this pin to VREF directly when the dead-time control is
not used.
5
CIN6
I
6
DTC5
I
IC
HPW7095
HPW7095A
CH1
Synchronous
Step-down
Synchronous
Step-down
CH2
Synchronous
Up-down
Synchronous
Step-up
CH3
Step-up
Step-up
CH4
Step-up
Inverting
CH5
Synchronous
Step-up
Synchronous
Step-up
CH6
Step-up
Step-up