參數(shù)資料
型號: HN58V65A
廠商: Hitachi,Ltd.
英文描述: 64 k EEPROM (8-kword ×8-bit)(64 k EEPROM (8k字 ×8位))
中文描述: 64畝的EEPROM(8 KWord的× 8位)(64畝的EEPROM(8K的字× 8位))
文件頁數(shù): 19/28頁
文件大小: 208K
代理商: HN58V65A
HN58V65A Series, HN58V66A Series
19
Functional Description
Automatic Page Write
Page-mode write feature allows 1 to 64 bytes of data to be written into the EEPROM in a single write
cycle. Following the initial byte cycle, an additional 1 to 63 bytes can be written in the same manner.
Each additional byte load cycle must be started within 30 μs from the preceding falling edge of
:(
or
&(
. When
&(
or
:(
is kept high for 100 μs after data input, the EEPROM enters write mode
automatically and the input data are written into the EEPROM.
'DWD
Polling
'DWD
polling indicates the status that the EEPROM is in a write cycle or not. If EEPROM is set to read
mode during a write cycle, an inversion of the last byte of data outputs from I/O7 to indicate that the
EEPROM is performing a write operation.
RDY/
%XV\
Signal
RDY/
%XV\
signal also allows status of the EEPROM to be determined. The RDY/
%XV\
signal has high
impedance except in write cycle and is lowered to V
OL
after the first write signal. At the end of a write
cycle, the RDY/
%XV\
signal changes state to high impedance.
5(6
Signal
(only the HN58V66A series)
When
5(6
is low, the EEPROM cannot be read or programmed. Therefore, data can be protected by
keeping
5(6
low when V
CC
is switched.
5(6
should be high during read and programming because it
doesn’t provide a latch function.
V
Program inhibit
CC
RES
Program inhibit
Read inhibit
Read inhibit
相關(guān)PDF資料
PDF描述
HN58V66A 64 k EEPROM (8-kword ×8-bit)(64 k EEPROM (8k字 ×8位))
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參數(shù)描述
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