- 您現(xiàn)在的位置：買(mǎi)賣(mài)IC網(wǎng) > PDF目錄385388 > HMS81032E (Hynix Semiconductor Inc.) HYNIX SEMICONDUCTOR 8-BIT SINGLE-CHIP MICROCONTROLLERS PDF資料下載
參數(shù)資料
| 型號(hào)： | HMS81032E |
| 廠商： | Hynix Semiconductor Inc. |
| 元件分類： | 8位微控制器 |
| 英文描述： | HYNIX SEMICONDUCTOR 8-BIT SINGLE-CHIP MICROCONTROLLERS |
| 中文描述： | Hynix半導(dǎo)體公司的8位單芯片微控制器 |
| 文件頁(yè)數(shù)： | 53/77頁(yè) |
| 文件大?。?/td> | 1112K |
| 代理商： | HMS81032E |
第1頁(yè)第2頁(yè)第3頁(yè)第4頁(yè)第5頁(yè)第6頁(yè)第7頁(yè)第8頁(yè)第9頁(yè)第10頁(yè)第11頁(yè)第12頁(yè)第13頁(yè)第14頁(yè)第15頁(yè)第16頁(yè)第17頁(yè)第18頁(yè)第19頁(yè)第20頁(yè)第21頁(yè)第22頁(yè)第23頁(yè)第24頁(yè)第25頁(yè)第26頁(yè)第27頁(yè)第28頁(yè)第29頁(yè)第30頁(yè)第31頁(yè)第32頁(yè)第33頁(yè)第34頁(yè)第35頁(yè)第36頁(yè)第37頁(yè)第38頁(yè)第39頁(yè)第40頁(yè)第41頁(yè)第42頁(yè)第43頁(yè)第44頁(yè)第45頁(yè)第46頁(yè)第47頁(yè)第48頁(yè)第49頁(yè)第50頁(yè)第51頁(yè)第52頁(yè)當(dāng)前第53頁(yè)第54頁(yè)第55頁(yè)第56頁(yè)第57頁(yè)第58頁(yè)第59頁(yè)第60頁(yè)第61頁(yè)第62頁(yè)第63頁(yè)第64頁(yè)第65頁(yè)第66頁(yè)第67頁(yè)第68頁(yè)第69頁(yè)第70頁(yè)第71頁(yè)第72頁(yè)第73頁(yè)第74頁(yè)第75頁(yè)第76頁(yè)第77頁(yè)
HMS81004E/08E/16E/24E/32E
50
JUNE 2001 Ver 1.00
14.4 Interrupt Sequence
An interrupt request is held until the interrupt is accepted or the
interrupt latch is cleared to “0” by a reset or an instruction. Inter-
rupt acceptance sequence requires 8
f
XIN
after the completion of
the current instruction execution. The interrupt service task is ter-
minated upon execution of an interrupt return instruction [RETI].
Interrupt acceptance
1. The interrupt master enable flag (I-flag) is cleared to
“0” to temporarily disable the acceptance of any follow-
ing maskable interrupts. When a non-maskable inter-
rupt is accepted, the acceptance of any following
interrupts is temporarily disabled.
2. Interrupt request flag for the interrupt source accepted is
cleared to “0”.
3. The contents of the program counter (return address)
and the program status word are saved (pushed) onto the
stack area. The stack pointer decreases 3 times.
4. The entry address of the interrupt service program is
read from the vector table address and the entry address
is loaded to the program counter.
5. The instruction stored at the entry address of the inter-
rupt service program is executed.
l
Figure 14-3 Interrupt Accept Mode & Selection by IP3~IP0
BTCL
IP3
7
6
5
4
3
2
1
0
IM1
INITIAL VALUE: --00_0000
B
ADDRESS: 0CA
H
IMOD
IP1
IP0
R/W
R/W
R/W
R/W
R/W
R/W
IM0
Interrupt mode register
Selection interrupt
0001: KSCNR
0010: INT1R
0011: INT2R
0101: T0R
0110: T1R
0111: T2R
1010: WDTR
1011: BITR
00: Fixed by hardware
01: Changeable by IP3~IP0
1x: Interrupt is inhibited
Priority
R/W
R/W
-
-
IP2
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| HMS81C43XX | CMOS SINGLE-CHIP 8-BIT MICROCONTROLLER FOR TELEVISION |
| HMS87C1304A | CMOS SINGLE-CHIP 8-BIT MICROCONTROLLER |
| HMS87C1302AD | CMOS SINGLE-CHIP 8-BIT MICROCONTROLLER |
| HMS87C1304AD | CMOS SINGLE-CHIP 8-BIT MICROCONTROLLER |
| HMS99C51 | 8-BIT SINGLE-CHIP MICROCONTROLLERS |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| HMS81032ET | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:REMOTE CONTROLLER |
| HMS81032TL | 制造商:HYNIX 制造商全稱:Hynix Semiconductor 功能描述:HYNIX SEMICONDUCTOR 8-BIT SINGLE-CHIP MICROCONTROLLERS |
| HMS81C2012A | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:CMOS Single-Chip 8-Bit Microcontroller with A/D Converter & VFD Driver |
| HMS81C2012AK | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:CMOS Single-Chip 8-Bit Microcontroller with A/D Converter & VFD Driver |
| HMS81C2012ALQ | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:CMOS Single-Chip 8-Bit Microcontroller with A/D Converter & VFD Driver |
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。