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參數(shù)資料
| 型號： | HMMC-3124 |
| 英文描述： | DC-12 GHz Packaged High Efficiency Divide-by-4 Prescaler(DC-12 GHz 封裝的高效除4定標(biāo)器) |
| 中文描述： | 的DC - 12 GHz的包裝高效率分頻4分頻器（直流12吉赫封裝的高效除四定標(biāo)器） |
| 文件頁數(shù)： | 6/6頁 |
| 文件大?。?/td> | 62K |
| 代理商： | HMMC-3124 |
This data sheet contains a variety of typical performance data. The information supplied
should not be interpreted as a complete list of circuit specifications. In this data sheet
the term
typical
refers to the 50th percentile performance. For additional information
contact your local Agilent sales representative.
Supplemental Information
Input DC Offset
As long as an RF signal is always
present and within the input
power specifications, there will
not be any problems with false
triggering or self-oscillations. If
this is not the case, you can put
≈
10K
to ground from the unused
input and this, when combined
with the on-chip 50
resistor to
V
CC
= 5, will put an offset of
≈
25 mV between the RF inputs
(i.e., if RF
in
has 10KQ to ground,
it will be at
≈
4.975V and RF
in
will
be at
≈
5V). If you want a 20 to
100 mV offset per the note on
page 3, the resistor value to
ground will be 12.45K
to 2.45K
when V
CC
= 5.
Biasing and DC-Blocking
The backside of the divider chip
is gold plated and attached to the
heat slug in the package. Also in
the package is a capacitor con-
nected between the chip’s topside
V
CC
rail and the heat slug making
the heat slug an RF ground. In the
majority of cases, you would tie
the exposed heat slug on the
bottom of the package to ground.
In a typical positive bias setup
with V
CC
= 5, V
EE
is DC ground
along with the package’s heat
slug. The RF input and RF output
nodes are each tied to V
CC
through 50
and will be floating
nominally at that bias level
(depending, of course, on the
input drive level and the appropri-
ate output state) so blocking
capacitors will usually be re-
quired. For a typical negative bias
setup with V
EE
= -5, V
CC
is DC
ground along with the package’s
heat slug. In some cases, such as
level shifting to subsequent
stages, you might want to “float”
the package and apply bias as the
difference between V
CC
and V
EE
.
For such applications, the
package’s heat slug must be
attached to a point that is both a
good heat sink and a good RF
ground.
Heat Slug/Bonding Pad
The exposed area of the
package’s backside heat slug (or
pad) measures 2.67 x 1.65 mm
(0.105" x 0.065"). Anything larger
than this on a PCB would be at
the customer’s preference or
convenience. On our test PCBs,
we use a 0.200" x 0.082" pad with
eight 0.020" diameter solder-filler
thermal vias.
www.semiconductor.agilent.com
Data subject to change.
Copyright 1999 Agilent Technologies
5968-4889E (11/99)
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相關(guān)代理商/技術(shù)參數(shù) |
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|---|---|
| HMMC-3124-BLK | 制造商:Agilent Technologies 功能描述:PRESCALER 5V 1/4 12000MHZ 8SOIC - Bulk |
| HMMC-3124-TR1 | 制造商:Agilent Technologies 功能描述:DC-12GHZ PACKAGED HIGH EFFICIENCY DIVIDE-BY-4 PRESCALER - Tape and Reel |
| HMMC-3128 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:SO-8 SMT 0.5-12GHz high eff. GaAs HBT prescalers |
| HMMC-3128-BLK | 制造商:Agilent Technologies 功能描述:DC-12GHZ PACKAGED HIGH EFFICIENCY DIVIDE-BY-8 PRESCALER - Bulk |
| HMMC-3128-TR1 | 制造商:Agilent Technologies 功能描述:DC-12GHZ PACKAGED HIGH EFFICIENCY DIVIDE-BY-8 PRESCALER - Tape and Reel |
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