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參數(shù)資料
| 型號： | HMD4M32M2G-5 |
| 廠商： | Hanbit Electronics Co.,Ltd. |
| 英文描述： | 16Mbyte(4Mx32) 72-pin SIMM Fast Page Mode, 4K Refresh, 5V |
| 中文描述： | 16Mbyte（4Mx32）72針的SIMM快速頁面模式，4K的刷新，5V的 |
| 文件頁數(shù)： | 5/7頁 |
| 文件大?。?/td> | 63K |
| 代理商： | HMD4M32M2G-5 |
HANBit HMD4M32M2G
URL:www.hbe.co.kr
- 5 -
HANBit Electronics Co.,Ltd.
REV.1.0 (August.2002)
Row address set-up time
t
ASR
0
0
ns
Row address hold time
t
RAH
10
10
ns
Column address set-up time
t
ASC
0
0
ns
Column address hold time
t
CAH
8
10
ns
Column address hold referenced to /RAS
t
AR
40
45
ns
Column Address to /RAS lead time
t
RAL
25
30
ns
Read command set-up time
t
RCS
0
0
ns
Read command hold referenced to /CAS
t
RCH
0
0
ns
Read command hold referenced to /RAS
t
RRH
0
0
ns
Write command hold time
t
WCH
10
10
ns
Write command hold referenced to /RAS
t
WCR
40
45
ns
Write command pulse width
t
WP
10
10
ns
Write command to /RAS lead time
t
RWL
13
15
ns
Write command to /CAS lead time
t
CWL
8
10
ns
Data-in set-up time
t
DS
0
0
ns
Data-in hold time
t
DH
8
10
ns
Data-in hold referenced to /RAS
t
DHR
40
45
ns
Refresh period
t
REF
64
64
ns
Write command set-up time
t
WCS
0
0
ns
/CAS to /W delay time
t
CWD
36
40
ns
/RAS to /W delay time
t
RWD
73
85
ns
/CAS precharge(C-B-R counter test)
t
CPT
20
20
ns
Column address to /W delay time
t
AWD
48
55
ns
Access time from /CAS precharge
t
CPA
30
35
ns
/CAS precharge time (Hyper Page cycle)
t
CP
8
10
ns
/RAS pulse width (Hyper Page cycle)
t
RASP
50 200K
60 200K
ns
/W to /RAS precharge time (C-B-R refresh)
t
WRP
10
10
ns
/W to /RAS hold time (C-B-R refresh)
t
WRH
10
10
ns
NOTES
1.
An initial pause of 200
μ
s is required after power-up followed by any 8 /RAS-only or /CAS-before-/RAS refresh cycles
before proper device operation is achieved.
2.
V
IH (min)
and V
IL (max)
are reference levels for measuring timing of input signals. Transition times are measured between
V
IH(min)
and V
IL(max)
and are assumed to be 5ns for all inputs.
3.
Measured with a load equivalent to 1TTL loads and 100pF
4.
Operation within the t
RCD(max)
limit insures that t
RAC(max)
can be met. t
RCD(max)
is specified as a reference point only. If t
RCD
is greater than the specified t
RCD(max)
limit, then access time is controlled exclusively by t
CAC
.
5.
Assumes that t
RCD
≥
t
RCD(max)
6. t
AR
, t
WCR
, t
DHR
are referenced to t
RAD(max)
7.This parameter defines the time at which the output achieves the open circuit condition and is not referenced to V
OH
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相關(guān)代理商/技術(shù)參數(shù) |
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|---|---|
| HMD4M32M2G-6 | 制造商:HANBIT 制造商全稱:Hanbit Electronics Co.,Ltd 功能描述:16Mbyte(4Mx32) 72-pin SIMM Fast Page Mode, 4K Refresh, 5V |
| HMD4M32M2VE | 制造商:HANBIT 制造商全稱:Hanbit Electronics Co.,Ltd 功能描述:16Mbyte(4Mx32) DRAM SIMM EDO MODE, 4K Refresh, 3.3V |
| HMD4M32M2VEG-5 | 制造商:HANBIT 制造商全稱:Hanbit Electronics Co.,Ltd 功能描述:16Mbyte(4Mx32) DRAM SIMM EDO MODE, 4K Refresh, 3.3V |
| HMD4M32M2VEG-6 | 制造商:HANBIT 制造商全稱:Hanbit Electronics Co.,Ltd 功能描述:16Mbyte(4Mx32) DRAM SIMM EDO MODE, 4K Refresh, 3.3V |
| HMD4M32M8AG | 制造商:HANBIT 制造商全稱:Hanbit Electronics Co.,Ltd 功能描述:16Mbyte(4Mx32) 72-pin EDO MODE, 2K/4K Ref. SIMM Design 5V |
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