參數(shù)資料
型號: HMD2M32M4EAG-6
廠商: Hanbit Electronics Co.,Ltd.
英文描述: 8Mbyte(2Mx32) EDO Mode, 1K Refresh 72Pin SIMM, 5V Design
中文描述: 8Mbyte(2Mx32)EDO公司模式,每1000刷新72Pin上海藥物研究所,5V的設(shè)計(jì)
文件頁數(shù): 4/7頁
文件大?。?/td> 74K
代理商: HMD2M32M4EAG-6
HANBit HMD2M32M4EAG
URL:www.hbe.co.kr HANBit Electronics Co.,Ltd.
REV. 1.0 (August.2002)
*
NOTE
: I
CC1
, I
CC3
, I
CC4
and I
CC6
are dependent on output loading and cycle rates. Specified values are obtained with the
output open. I
CC
is specified as an average current. In I
CC1
and I
CC3
, address cad be changed maximum once
while /RAS=V
IL
. In I
CC4
, address can be changed maximum once within one page mode cycle.
CAPACITANCE
( T
A
=25
o
C, Vcc = 5V, f = 1Mz )
DESCRIPTION
SYMBOL
MIN
MAX
UNITS
Input Capacitance (A0-A10)
C
IN1
-
44
pF
Input Capacitance (/W)
C
IN2
-
48
pF
Input Capacitance (/RAS0)
C
IN3
-
40
pF
Input Capacitance (/CAS0-/CAS3)
C
IN4
-
29
pF
Input/Output Capacitance (DQ0-31)
C
DQ1
-
29
pF
AC CHARACTERISTICS
( 0
o
C
T
A
70oC , Vcc = 5V
±
10%, See notes 1,2.)
-5
-6
STANDARD OPERATION
SYMBOL
MIN MAX
MIN MAX
UNIT
Random read or write cycle time
t
RC
90
110
ns
Access time from /RAS
t
RAC
50
60
ns
Access time from /CAS
t
CAC
15
17
ns
Access time from column address
t
AA
25
30
ns
/CAS to output in Low-Z
t
CLZ
3
3
ns
Output buffer turn-off delay
t
OFF
3 13
3 15
ns
Transition time (rise and fall)
t
T
2 50
2 50
ns
/RAS precharge time
t
RP
30
40
ns
/RAS pulse width
t
RAS
50 10K
60 10K
ns
/RAS hold time
t
RSH
13
17
ns
/CAS hold time
t
CSH
40
50
ns
/CAS pulse width
t
CAS
8 10K
10 10K
ns
/RAS to /CAS delay time
t
RCD
20 37
20 45
ns
/RAS to column address delay time
t
RAD
15 25
15 30
ns
/CAS to /RAS precharge time
t
CRP
5
5
ns
Row address set-up time
t
ASR
0
0
ns
Row address hold time
t
RAH
10
10
ns
Column address set-up time
t
ASC
0
0
ns
Column address hold time
t
CAH
8
10
ns
Column Address to /RAS lead time
t
RAL
25
30
ns
Read command set-up time
t
RCS
0
0
ns
Read command hold referenced to /CAS
t
RCH
0
0
ns
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