參數(shù)資料
型號(hào): HMD1M36M3EG
廠商: Hanbit Electronics Co.,Ltd.
英文描述: 4Mbyte(1Mx36) 72-pin SIMM EDO with Parity MODE, 1K Ref. 5V
中文描述: 4Mbyte(1Mx36)72引腳平價(jià)模式,每1000參考上海藥物研究所易都。 5V的
文件頁(yè)數(shù): 5/7頁(yè)
文件大?。?/td> 64K
代理商: HMD1M36M3EG
HANBit HMD1M36M3EG
URL:www.hbe.co.kr
HANBit Electronics Co.,Ltd.
REV.1.0(August.2002)
/CAS to /RAS precharge time
t
CRP
5
5
ns
Row address set-up time
t
ASR
0
0
ns
Row address hold time
t
RAH
10
10
ns
Column address set-up time
t
ASC
0
0
ns
Column address hold time
t
CAH
8
10
ns
Column Address to /RAS lead time
t
RAL
25
30
ns
Read command set-up time
t
RCS
0
0
ns
Read command hold referenced to /CAS
t
RCH
0
0
ns
Read command hold referenced to /RAS
t
RRH
0
0
ns
Write command hold time
t
WCH
10
10
ns
Write command hold referenced to /RAS
t
WCR
50
50
ns
Write command pulse width
t
WP
10
10
ns
Write command to /RAS lead time
t
RWL
13
15
ns
Write command to /CAS lead time
t
CWL
8
10
ns
Data-in set-up time
t
DS
0
0
ns
Data-in hold time
t
DH
8
10
ns
Data-in hold referenced to /RAS
t
DHR
50
50
ns
Refresh period
t
REF
64
64
ns
Write command set-up time
t
WCS
0
0
ns
/CAS setup time (C-B-R refresh)
t
CSR
5
5
ns
/CAS hold time (C-B-R refresh)
t
CHR
10
10
ns
/RAS precharge to /CAS hold time
t
RPC
5
5
ns
Access time from /CAS precharge
t
CPA
30
35
ns
Fast page mode cycle time
t
PC
40
40
ns
/CAS precharge time (Fast page)
t
CP
8
10
ns
/RAS pulse width (Fast page )
t
RASP
50
200K
60
200K
ns
/W to /RAS precharge time (C-B-R refresh)
t
WRP
10
10
ns
/W to /RAS hold time (C-B-R refresh)
t
WRH
10
10
ns
/CAS precharge(C-B-R counter test)
t
CPT
20
20
ns
NOTES
1.
An initial pause of 200
μ
s is required after power-up followed by any 8 /RAS-only or /CAS-before-/RAS refresh cycles
before proper device operation is achieved.
2.
V
IH (min)
and V
IL (max)
are reference levels for measuring timing of input signals. Transition times are measured between
V
IH(min)
and V
IL(max)
and are assumed to be 5ns for all inputs.
3.
Measured with a load equivalent to 2TTL loads and 100pF
4.
Operation within the t
RCD(max)
limit insures that t
RAC(max)
can be met. t
RCD(max)
is specified as a reference point only. If t
RCD
is greater than the specified t
RCD(max)
limit, then access time is controlled exclusively by t
CAC
.
5.
Assumes that t
RCD
t
RCD(max)
6. t
AR
, t
WCR
, t
DHR
are referenced to t
RAD(max)
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