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參數(shù)資料
| 型號(hào)： | HMD1M32M2G-7 |
| 廠商： | Hanbit Electronics Co.,Ltd. |
| 英文描述： | 4Mbyte(1Mx32) Fast Page Mode, 1K Refresh, 72Pin SIMM, 5V Design |
| 中文描述： | 4Mbyte（1Mx32）快速頁(yè)面模式，每1000刷新，72Pin上海藥物研究所，5V的設(shè)計(jì) |
| 文件頁(yè)數(shù)： | 6/8頁(yè) |
| 文件大?。?/td> | 200K |
| 代理商： | HMD1M32M2G-7 |
HANBit HMD1M32M2G
URL:www.hbe.co.kr
HANBiT Electronics Co., Ltd
REV.1.0 (August.2002)
tRPC
/RAS Precharge to /CAS Hold Time
5
-
5
-
ns
FAST PAGE MODE CYCLE
-6
-7
SYMBOL
PARAMETER
MIN
MAX
MIN
MAX
UNIT
NOTE
tPC
Fast Page Mode Cycle Time
40
-
45
-
ns
tCP
Fast Page Mode /RAS Precharge Time
10
-
10
-
ns
tRASP
Fast Page Mode /CAS Pulse Time
60
100K
70
100K
ns
13
tACP
Access Time from /CAS Precharge
-
35
-
40
ns
14
tRHCP
/RAS Hold Time from /CAS Precharge
Note
: 1. AC measurements assume
t
T = 5ns.
35
-
40
-
ns
2. Assumes that
t
RCD<=
t
RCD(max) and
t
RCD<=
t
RCD(max). If
t
RCD or
t
RCD is greater than the maximum
recommended value shown in this table,
t
RCD exceeds the value shown.
3. Measured with a load circuit equivalent to 2TTL loads and 100PpF.
4. Assumes that
t
RCD >=
t
RCD (max) and
t
RCD<=
t
RCD (max).
5.Assumes that tRCD <=
t
RCD (max) and
t
RCD>=
t
RCD (max).
6.Either
t
RCH or
t
RRH must be satisfied for a read cycles.
7.
t
OFF(max) defines the time at which the outputs achieve the open circuit condition and is not referenced to output
voltage levels.
8. VIH(min) and VIL(max) are reference levels for measuring timing of input signals.
Also, transition times are measured between VIH and VIL.
9. Operation with the
t
RCD (max) limit insures that
t
RAC (max) can be met,
t
RCD (max) is specified as a reference
point only, if
t
RCD is greater than the specified
t
RCD (max) limit, then access time is controlled exclusively by
t
CAC .
10. Operation with the
t
RAD (max) limit insures that
t
RAC (max) can be met,
t
RAD (max) is specified as a reference
point only, if
t
RAD is greater than the specified
t
RAD (max) limit, then access time is controlled exclusively by
t
AA.
11. TWCS is not restrictive operating parameter. It is included in the data sheet as electrical characteristics only.
If
t
wcs >=
t
wcs (min), the cycle is an early write cycle and the data out pin will remain open circuit(high impe-
dance) throughout the entire cycle.
12. These parameters are referenced to /CAS leading edge in early write cycles.
13.
t
RASP is defines /RAS pulse width in Fast Page Mode cycles.
14. Access time is determined by the longer of
t
AA or
t
CAC or
t
ACP .
15. An initial pause of 200us is required after power up followed by a minimum of eight initialization cycle (eny
combination of cycles containing /RAS clock such as /RAS only refresh).
If the internal refresh count is used, a mnimum of eight /CAS before /RAS refresh cycle are required.
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| HMD1M32M2GL | 制造商:HANBIT 制造商全稱(chēng):Hanbit Electronics Co.,Ltd 功能描述:4Mbyte(1Mx32) Fast Page Mode, 1K Refresh, 72Pin SIMM, 5V Design |
| HMD1M32M2GL-5 | 制造商:HANBIT 制造商全稱(chēng):Hanbit Electronics Co.,Ltd 功能描述:4Mbyte(1Mx32) Fast Page Mode, 1K Refresh, 72Pin SIMM, 5V Design |
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| HMD1M36M3EG-5 | 制造商:HANBIT 制造商全稱(chēng):Hanbit Electronics Co.,Ltd 功能描述:4Mbyte(1Mx36) 72-pin SIMM EDO with Parity MODE, 1K Ref. 5V |
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