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參數(shù)資料
| 型號： | HM62W1400H |
| 廠商： | Hitachi,Ltd. |
| 英文描述： | 4M High Speed SRAM (4-Mword ×1-bit)(4M高速靜態(tài)RAM(4M字 ×1位)) |
| 中文描述： | 4分高速SRAM（4 Mword × 1位）（4分高速靜態(tài)隨機(jī)存儲器（4分字× 1位）） |
| 文件頁數(shù)： | 14/15頁 |
| 文件大?。?/td> | 335K |
| 代理商： | HM62W1400H |
HM62W1400H Series
14
Revision Record
Rev. Date
Contents of Modification
Drawn by
Approved by
0.0
Apr. 28, 1997 Initial issue
A. Ide
A. Ide
0.1
Nov. 20, 1997 Change of Subtitle
K. Makuta
K. Makuta
0.2
Dec. 5, 1997
Features
Addition of Operating current
Addition of TTL standby current
Addition of CMOS standby current
Addition of Data retention current
Addition of Data retention voltage
Change of Block Diagram
Operation table
Title: I/O to Dout
Dout: Din to High-Z
Absolute Maximum Ratings
Change of notes
Recommended DC Operating Conditions
Change of notes
DC Characteristics
I
CC
(max): 240/200/190 mA to 160/140/120 mA
I
SB
(max): 100/100/100 mA to 70/60/50 mA
I
(max): 10/0.5 mA to 5/1 mA
Test conditions I
CC
and I
: Addition of Min cycle
Test conditions I
SB1
: Addition of f = 0 MHz
Capacitance
Addition of C
Input/output capacitance: C
I/O
to C
DOUT
AC Characteristics
Change of Output load (A)
t
OE
, t
CHZ
and t
OHZ
(max): 5/6/8 ns to 5/6/7 ns
t
AW
, t
and t
(min): 6/8/10 ns to 7/8/10 ns
t
DW
(min): 5/6/8 ns to 5/6/7 ns
t
and t
(max): 5/6/8 ns to 5/6/7 ns
Note 4.: Correct error
Low V
CC
Data Retention Characteristics
I
CCDR
: —/2/300
μ
A to —/—/300
μ
A
May. 15, 1998 Features
Change of Operating current
Change of Block Diagram
DC Characteristics
I
CC
(max): 170/150/130 mA to 200/180/160 mA
Sep. 15, 1998 Delete of HM62W1400H-10 Series
Features
Change of Data retention current
DC Characteristics
I
(typ): —/— mA to 0.05/0.05 mA
Low V
CC
Data Retention Characteristics
I
CCDR
: —/—/300
μ
A to —/40/600
μ
A
T. Fukazawa
K. Makuta
0.3
T. Fukazawa
K. Makuta
1.0
T. Fukazawa
K. Makuta
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