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參數(shù)資料
| 型號： | HM628512CLP-7SL |
| 廠商： | Hitachi,Ltd. |
| 元件分類： | SRAM |
| 英文描述： | 4 M SRAM (512-kword x 8-bit) |
| 中文描述： | 四米的SRAM（512 - KWord的× 8位） |
| 文件頁數(shù)： | 3/17頁 |
| 文件大?。?/td> | 84K |
| 代理商： | HM628512CLP-7SL |
HM628512C Series
3
Pin Arrangement
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
A18
A16
A14
A12
A7
A6
A5
A4
A3
A2
A1
A0
I/O0
I/O1
I/O2
V
V
A15
A17
WE
A13
A8
A9
A11
OE
A10
CS
I/O7
I/O6
I/O5
I/O4
I/O3
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
V
A15
A17
WE
A13
A8
A9
A11
OE
A10
CS
I/O7
I/O6
I/O5
I/O4
I/O3
A18
A16
A14
A12
A7
A6
A5
A4
A3
A2
A1
A0
I/O0
I/O1
I/O2
V
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
A18
A16
A14
A12
A7
A6
A5
A4
A3
A2
A1
A0
I/O0
I/O1
I/O2
V
SS
V
A15
A17
WE
A13
A8
A9
A11
OE
A10
CS
I/O7
I/O6
I/O5
I/O4
I/O3
CC
(Top view)
32-pin DIP
32-pin SOP
32-pin TSOP
32-pin TSOP (reverse)
(Top view)
(Top view)
Pin Description
Pin name
Function
A0 to A18
Address input
I/O0 to I/O7
CS
OE
WE
Data input/output
Chip select
Output enable
Write enable
V
CC
V
SS
Power supply
Ground
相關PDF資料 |
PDF描述 |
|---|---|
| HM628512CLRR-7SL | 4 M SRAM (512-kword x 8-bit) |
| HM628512CLTT-5SL | 4 M SRAM (512-kword x 8-bit) |
| HM628512CLTT-7 | 4 M SRAM (512-kword x 8-bit) |
| HM628512CLTT-7SL | Quadruple 2-Line To 1-Line Data Selectors/Multiplexers 16-CDIP -55 to 125 |
| HM628512CLRR-5SL | 4 M SRAM (512-kword x 8-bit) |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| HM628512CLPI-7 | 制造商:HITACHI 制造商全稱:Hitachi Semiconductor 功能描述:Wide Temperature Range Version 4 M SRAM (512-kword x 8-bit) |
| HM628512CLRR-5 | 制造商:HITACHI 制造商全稱:Hitachi Semiconductor 功能描述:4 M SRAM (512-kword x 8-bit) |
| HM628512CLRR-5SL | 制造商:HITACHI 制造商全稱:Hitachi Semiconductor 功能描述:4 M SRAM (512-kword x 8-bit) |
| HM628512CLRR-7 | 制造商:Renesas Electronics Corporation 功能描述: |
| HM628512CLRR-7SL | 制造商:HITACHI 制造商全稱:Hitachi Semiconductor 功能描述:4 M SRAM (512-kword x 8-bit) |
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