參數(shù)資料
型號(hào): HM624100HC
廠商: Hitachi,Ltd.
英文描述: Dual J-K Negative-Edge-Triggered Flip-Flops With Preset And Clear 16-CDIP -55 to 125
中文描述: 4分高速SRAM(1 - Mword × 4位)
文件頁(yè)數(shù): 1/14頁(yè)
文件大?。?/td> 65K
代理商: HM624100HC
Preliminary: The specification of this device are subject to change without notice. Please contact your nearest
Hitachi’s Sales Dept. regarding specification.
HM624100HC Series
4M High Speed SRAM (1-Mword
×
4-bit)
ADE-203-1198 (Z)
Preliminary
Rev. 0.0
Nov. 30, 2000
Description
The HM624100HC is a 4-Mbit high speed static RAM organized 1-Mword
×
4-bit. It has realized high speed
access time by employing CMOS process (6-transistor memory cell) and high speed circuit designing
technology. It is most appropriate for the application which requires high speed and high density memory,
such as cache and buffer memory in system. The HM624100HC is packaged in 400-mil 32-pin SOJ for high
density surface mounting.
Features
Single 5.0 V supply : 5.0 V ± 10 %
Access time 10 ns (max)
Completely static memory
No clock or timing strobe required
Equal access and cycle times
Directly TTL compatible
All inputs and outputs
Operating current : 140 mA (max)
TTL standby current : 40 mA (max)
CMOS standby ccurrent : 5 mA (max)
: 1.2 mA (max) (L-version)
Data retension current : 0.8 mA (max) (L-version)
Data retension voltage : 2.0 V (min) (L-version)
Center V
CC
and V
SS
type pinout
相關(guān)PDF資料
PDF描述
HM624100HJP-10 4M High Speed SRAM (1-Mword x 4-bit)
HM624100HJP-12 SMT CAPACITOR - 0.1 UF, 50 VOLT, 20%
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
HM624100HCJP-10 制造商:HITACHI 制造商全稱:Hitachi Semiconductor 功能描述:4M High Speed SRAM (1-Mword x 4-bit)
HM624100HCJP-12 制造商:未知廠家 制造商全稱:未知廠家 功能描述:SRAM: Notes on Usage Technical Update/Device
HM624100HCLJP-10 制造商:HITACHI 制造商全稱:Hitachi Semiconductor 功能描述:4M High Speed SRAM (1-Mword x 4-bit)
HM624100HCLJP-12 制造商:未知廠家 制造商全稱:未知廠家 功能描述:SRAM: Notes on Usage Technical Update/Device
HM624100HJP-10 制造商:HITACHI 制造商全稱:Hitachi Semiconductor 功能描述:4M High Speed SRAM (1-Mword x 4-bit)