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參數(shù)資料
| 型號(hào)： | HM5257165BTD-75 |
| 廠商： | ELPIDA MEMORY INC |
| 元件分類： | DRAM |
| 英文描述： | 512M LVTTL interface SDRAM 133 MHz/100 MHz 8-Mword 】 16-bit 】 4-bank/16-Mword 】 8-bit 】 4-bank /32-Mword 】 4-bit 】 4-bank PC/133, PC/100 SDRAM |
| 中文描述： | 32M X 16 SYNCHRONOUS DRAM, 5.4 ns, PDSO54 |
| 封裝： | 0.400 INCH, PLASTIC, TSOP2-54 |
| 文件頁數(shù)： | 30/62頁 |
| 文件大?。?/td> | 463K |
| 代理商： | HM5257165BTD-75 |
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HM5257165B/HM5257805B/HM5257405B-75/A6
Data Sheet E0081H10
30
Read with auto precharge to Read command interval
1. Different bank:
When some banks are in the active state, the second read command (another bank) is
executed. Even when the first read with auto-precharge is a burst read that is not yet finished, the data read by
the second command is valid. The internal auto-precharge of one bank starts at the next clock of the second
command.
Read with Auto Precharge to Read Command Interval
(Different bank)
CLK
Command
BS
Dout
READ A
READ
out A0
out A1
out B0
out B1
CAS
Latency = 3
Burst Length = 4
bank0
Read A
bank3
Read
Note: Internal auto-precharge starts at the timing indicated by " ".
2. Same bank:
The consecutive read command (the same bank) is illegal.
Write with auto precharge to Write command interval
1. Different bank:
When some banks are in the active state, the second write command (another bank) is
executed. In the case of burst writes, the second write command has priority. The internal auto-precharge of
one bank starts at the next clock of the second command .
Write with Auto Precharge to Write Command Interval
(Different bank)
CLK
Command
BS
Din
WRIT A
WRIT
in B1
in B2
in B3
in A0
in A1
in B0
Burst Length = 4
bank0
Write A
bank3
Write
Note: Internal auto-precharge starts at the timing indicated by " ".
2. Same bank:
The consecutive write command (the same bank) is illegal.
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