- 您現(xiàn)在的位置：買(mǎi)賣(mài)IC網(wǎng) > PDF目錄371830 > HM1-65262-9 (INTERSIL CORP) 16K x 1 Asynchronous CMOS Static RAM PDF資料下載
參數(shù)資料
| 型號(hào)： | HM1-65262-9 |
| 廠商： | INTERSIL CORP |
| 元件分類(lèi)： | SRAM |
| 英文描述： | 16K x 1 Asynchronous CMOS Static RAM |
| 中文描述： | 16K X 1 STANDARD SRAM, 85 ns, CDIP20 |
| 封裝： | CERAMIC, DIP-20 |
| 文件頁(yè)數(shù)： | 5/7頁(yè) |
| 文件大?。?/td> | 41K |
| 代理商： | HM1-65262-9 |
6-5
Timing Waveforms
NOTE:
1. W is high for entire cycle and D is ignored. Address is stable by the time E goes low and remains valid until E goes high.
FIGURE 1. READ CYCLE 1: CONTROLLED BY E
NOTE:
1. W is high for the entire cycle and D is ignored. E is stable prior to A becoming valid and after A becomes invalid.
FIGURE 2. READ CYCLE 2: CONTROLLED BY ADDRESS
NOTE:
1. In this mode, E rises after W. The address must remain stable whenever both E and W are low.
FIGURE 3. WRITE CYCLE 1: CONTROLLED BY W (LATE WRITE)
(4) TELQX
A
(3) TELQV
(5) TEHQX
(7) TEHQZ
E
Q
(1) TAVAX
(2) TAVQV
(4) TELQX
A
E
Q
(7) TEHQZ
(6) TAXQX
A
(17) TAVWH
(9) TELWH
(12) TWHAX
(10) TWLWH
(11)
TAVWL
(7) TEHQZ
(14) TWHDX
(13) TDVWH
(15) TWLQZ
(4)
TELQX
(16) TWHQX
(8) TAVAX
E
W
D
Q
HM-65262
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| HM1-65262B-9 | 16K x 1 Asynchronous CMOS Static RAM |
| HM-6551B883 | 256 x 4 CMOS RAM |
| HM-6551 | 256 x 4 CMOS RAM |
| HM-6551883 | 256 x 4 CMOS RAM |
| HM1-6551883 | 256 x 4 CMOS RAM |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| HM1-65262-9+ | 制造商:未知廠家 制造商全稱(chēng):未知廠家 功能描述:x1 SRAM |
| HM1-65262B-2 | 制造商:未知廠家 制造商全稱(chēng):未知廠家 功能描述:x1 SRAM |
| HM1-65262B-8 | 制造商:未知廠家 制造商全稱(chēng):未知廠家 功能描述:x1 SRAM |
| HM1-65262B-9 | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| HM1-65262B-9+ | 制造商:未知廠家 制造商全稱(chēng):未知廠家 功能描述:x1 SRAM |
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。