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參數資料
| 型號： | HM-6551 |
| 廠商： | Intersil Corporation |
| 英文描述： | 256 x 4 CMOS RAM |
| 中文描述： | 256 × 4 CMOS存儲器 |
| 文件頁數： | 4/9頁 |
| 文件大小： | 116K |
| 代理商： | HM-6551 |
6-104
TABLE 2. HM-6551/883 A.C. ELECTRICAL PERFORMANCE SPECIFICATIONS
Device Guaranteed and 100% Tested
PARAMETER
SYMBOL
(NOTES 1, 2)
CONDITIONS
GROUP A
SUB-
GROUPS
TEMPERATURE
LIMITS
UNITS
HM-6551B/883
HM-6551/883
MIN
MAX
MIN
MAX
Chip Enable
Access Time
(1)
TELQV
VCC = 4.5 and
5.5V
9, 10, 11
-55
o
C
≤
T
A
≤
+125
o
C
-
220
-
300
ns
Address Access
Time
(2)
TAVQV
VCC = 4.5 and
5.5V, Note 3
9, 10, 11
-55
o
C
≤
T
A
≤
+125
o
C
-
220
-
300
ns
Chip Select 1
Output Enable
Time
(3)
TS1LQX
VCC = 4.5 and
5.5V
9, 10, 11
-55
o
C
≤
T
A
≤
+125
o
C
5
-
5
-
ns
Write Enable
Output Disable
Time
(4)
TWLQZ
VCC = 4.5 and
5.5V
9, 10, 11
-55
o
C
≤
T
A
≤
+125
o
C
-
130
-
150
ns
Chip Select 1
Output Disable
Time
(5)
TS1HQZ
VCC = 4.5 and
5.5V
9, 10, 11
-55
o
C
≤
T
A
≤
+125
o
C
-
130
-
150
ns
Chip Enable Pulse
Negative Width
(6)
TELEH
VCC = 4.5 and
5.5V
9, 10, 11
-55
o
C
≤
T
A
≤
+125
o
C
220
-
300
-
ns
Chip Enable Pulse
Positive Width
(7)
TEHEL
VCC = 4.5 and
5.5V
9, 10, 11
-55
o
C
≤
T
A
≤
+125
o
C
100
-
100
-
ns
Address Setup
Time
(8)
TAVEL
VCC = 4.5 and
5.5V
9, 10, 11
-55
o
C
≤
T
A
≤
+125
o
C
0
-
0
-
ns
Chip Select 2
Setup Time
(9)
TS2LEL
VCC = 4.5 and
5.5V
9, 10, 11
-55
o
C
≤
T
A
≤
+125
o
C
0
-
0
-
ns
Address Hold Time
(10)
TELAX
VCC = 4.5 and
5.5V
9, 10, 11
-55
o
C
≤
T
A
≤
+125
o
C
40
-
50
-
ns
Chip Select 2 Hold
Time
(11)
TELS2X
VCC = 4.5 and
5.5V
9, 10, 11
-55
o
C
≤
T
A
≤
+125
o
C
40
-
50
-
ns
Data Setup Time
(12)
TDVWH
VCC = 4.5 and
5.5V
9, 10, 11
-55
o
C
≤
T
A
≤
+125
o
C
100
-
150
-
ns
Data Hold Time
(13)
TWHDX
VCC = 4.5 and
5.5V
9, 10, 11
-55
o
C
≤
T
A
≤
+125
o
C
0
-
0
-
ns
Chip Select 1 Write
Pulse Setup Time
(14)
TWLS1H
VCC = 4.5 and
5.5V
9, 10, 11
-55
o
C
≤
T
A
≤
+125
o
C
120
-
180
-
ns
Chip Enable Write
Pulse Setup Time
(15)
TWLEH
VCC = 4.5 and
5.5V
9, 10, 11
-55
o
C
≤
T
A
≤
+125
o
C
120
-
180
-
ns
Chip Select 1 Write
Pulse Hold Time
(16)
TS1LWH
VCC = 4.5 and
5.5V
9, 10, 11
-55
o
C
≤
T
A
≤
+125
o
C
120
-
180
-
ns
Chip Enable Write
Pulse Hold Time
(17)
TELWH
VCC = 4.5 and
5.5V
9, 10, 11
-55
o
C
≤
T
A
≤
+125
o
C
120
-
180
-
ns
Write Enable Pulse
Width
(18)
TWLWH
VCC = 4.5 and
5.5V
9, 10, 11
-55
o
C
≤
T
A
≤
+125
o
C
120
-
180
-
ns
Read or Write
Cycle Time
(19)
TELEL
VCC = 4.5 and
5.5V
9, 10, 11
-55
o
C
≤
T
A
≤
+125
o
C
320
-
400
-
ns
NOTES:
1. All voltages referenced to device GND.
2. Input pulse levels: 0.8V to VCC-2.0V; Input rise and fall times: 5ns (max); Input and output timing reference level: 1.5V; Output load:
IOL = 1.6mA, IOH = -0.4mA, CL = 50pF (min) - for CL greater than 50pF, access time is derated by 0.15ns per pF.
3. TAVQV = TELQV + TAVEL.
HM-6551/883
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相關代理商/技術參數 |
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|---|---|
| HM-6551/883 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:256 x 4 CMOS RAM |
| HM-6551_03 | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:256 x 4 CMOS RAM |
| HM-6551883 | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:256 x 4 CMOS RAM |
| HM-6551B883 | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:256 x 4 CMOS RAM |
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