參數(shù)資料
型號(hào)： HIP7020
廠商： Intersil Corporation
元件分類： FPGA
英文描述： FPGA 2000000 SYSTEM GATE 1.8 VOLT - NOT RECOMMENDED for NEW DESIGN
中文描述： J1850總線收發(fā)器，多重布線系統(tǒng)
文件頁數(shù)： 4/11頁
文件大小： 81K
代理商： HIP7020
4
Bus Emissions Voltage Output
V
dB_LIMIT
I
BO_LEAK
-60
-
-
dBV
BUS OUT Leakage Currents
Battery Low/Off1
0V
≤
V
BUS OUT
≤
20V; 0V
≤
V
BATT
≤
0.8V;
-0.3V
≤
V
TX
≤
7V
-20V
≤
V
BUS OUT
≤
0V; 0V
≤
V
BATT
≤
0.8V;
-0.3V
≤
V
TX
≤
7V
V
BOH
<
V
BUS OUT
≤
20V; 6V
≤
V
BATT
≤
16V;
2V
≤
V
TX
≤
7V
0V
≤
V
BUS OUT
≤
20V; 6V
≤
V
BATT
≤
16V;
-0.3V
≤
V
TX
≤
0.8V
-20V
≤
V
BUS OUT
<
0V; 9.5V
≤
V
BATT
≤
16V;
-0.3V
≤
V
TX
≤
0.8V
V
GND
≤
V
BUS OUT
<
20V; 0V
≤
V
BATT
≤
16V;
-0.3V
≤
V
TX
≤
7V; 0V
≤
(V
BATT
- V
GND
)
≤
0.8V
-20V
≤
V
BUS OUT
≤
V
GND
; 0V
≤
V
BATT
≤
16V;
-0.3V
≤
V
TX
≤
7V; 0V
≤
(V
BATT
- V
GND
)
≤
0.8V
R
S
= 56.2k
; V
BUS OUT
= 3.875V (Note 8)
-10
-
10
μ
A
Battery Low/Off2
-100
-
10
μ
A
Bus High
-10
-
10
μ
A
TX Low1
-10
-
10
μ
A
TX Low2
-3000
-
10
μ
A
With Loss of Ground1 (Note 11)
-10
-
10
μ
A
With Loss of Ground2 (Note 11)
-100
-
10
μ
A
TX to BUS OUT Propagation
Delays
BUS OUT Transition Times,
Rise and Fall
BUS OUT Noise Rejection
BUS OUT RF Isolation
BUS IN
Input Threshold Voltage
Input Bias Current
Input Capacitance
RX OUTPUT
Output Voltage, Low
Output Current
Output Leakage Current
Receive Propagation Delay
t
DTXHBO
,
t
DTXLBO
t
r
, t
f
9
16
23
μ
s
R
S
= 56.2k
; Measured on BUS OUT between 1.5V
and 6.25V (Note 8)
f
R
= 30Hz to 250kHz; V
BATT
to BUS OUT
f
I
= 0.25MHz to 200MHz; V
BATT
to BUS OUT
11
16
19
μ
s
N
R
N
I
20
20
-
-
-
-
dB
dB
V
BIH
I
BIN
C
BIN
3.6
-5
10
-
-
-
4.15
5
20
V
μ
A
pF
-20V
≤
V
BUS IN
≤
20V
V
IL
I
RX
I
RX
= 1.6mA
V
RX
= 5V (Note 10)
V
RX
= 5V, R
D
= 10k
; V
BUSIN
Low
Measured from BUS IN Threshold Voltage
0.01
2
-10
1
-
5
-
-
0.4
8
10
3
V
mA
μ
A
μ
s
I
RX(LK)
t
DRXON
,
t
DRXOFF
LB EN CMOS/TTL INPUT WITH/PULL DOWN
Input Low Voltage
Input High Voltage
Input Bias Current
TX To RX Turn ON, OFF;
Delay In Loop-Back Mode
LB EN Turn ON, OFF;
TX to BUS OUT
V
IL
V
IH
I
LB
-
-
-
-
-
0.8
-
12
26
V
V
μ
A
μ
s
2.0
5
12
V
LB
= 7V; (Note 9)
V
LB
Low; Toggle TX; Meas. RX
t
DLBON
,
t
DLBOFF
t
D(LH)
,
t
D(HL)
V
TX
High; Toggle LB EN; Meas. BUS OUT
1
-
10
μ
s
NOTES:
5. In the operating voltage range from 6V to 8.5V the BUS OUT, V
BOH
is limited by the low power supply. In the operating voltage range
from 16V to 24V the maximum bus load is limited by the package power dissipation ratings.
6. Over-temperature shutdown with hysteresis is incorporated to protect the IC under system failure conditions.
7. Measured Current into the TX terminal is determined by Pull-Down Current Sink.
8. Propagation Delay limits are measured at the 3.875V level on BUS OUT. Rise and Fall Times are measured between 1.5V and 6.25V on
the BUS OUT terminal.
9. Measured Current into the LB EN terminal is determined by Pull-Down Current Sink.
10. The I
RX
Output Current test parameter defines Short Circuit protection limits.
11. Loss of Ground refers to loss of module (node) Ground which results in a voltage between the Battery and IC Ground of less than 0.8V.
For voltage between Battery and Ground above 0.8V, the Transceiver Bus Output may become active. The module circuit in Figure 3 is
used to measure the Loss of Ground leakage.
12. Unless otherwise noted, all Electrical Specification test conditions are as shown in Figure 4.
13. The lower limit is 6.6V or V
BATT
- 1.7V, whichever is less.
Electrical Specifications
9.0V
≤
V
BATT
≤
16V; R
S
= 56.2k
±
1%; except as noted, R
BS
= 500
to 1500
and
τ
= R
BS
C
BS
= 5
μ
s.
All voltages are measured with respect to ground and the T
A
Range of -40
o
C to 125
o
C shall not be
exceeded during test unless otherwise specified. For test detail, refer to the Block Diagram, Figures 3
and 4 Test Circuits and Figures 5 and 6 Waveforms.
(Continued)
PARAMETER
SYMBOL
TEST CONDITIONS
MIN
TYP
MAX
UNITS
HIP7020
相關(guān)PDF資料
PDF描述
HIP7020AB FPGA 2000000 SYSTEM GATE 1.8 VOLT - NOT RECOMMENDED for NEW DESIGN
HIP7020AP FPGA 2000000 SYSTEM GATE 1.8 VOLT - NOT RECOMMENDED for NEW DESIGN
HIP7030A0 J1850 8-Bit 68HC05 Microcontroller Emulator Version
HIP7030A0M FPGA - 200000 SYSTEM GATE 2.5 VOLT - NOT RECOMMENDED for NEW DESIGN
HIP7030A2 FPGA - 200000 SYSTEM GATE 2.5 VOLT - NOT RECOMMENDED for NEW DESIGN
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
HIP7020 DIE 制造商:Harris Corporation 功能描述:
HIP7020AB 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:J1850 Bus Transceiver For Multiplex Wiring Systems
HIP7020AP 制造商:Harris Corporation 功能描述:
HIP7030A0 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:J1850 8-Bit 68HC05 Microcontroller Emulator Version
HIP7030A0M 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:J1850 8-Bit 68HC05 Microcontroller Emulator Version
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