參數(shù)資料
型號(hào): HIP6007
廠商: Intersil Corporation
英文描述: Buck Pulse-Width Modulator (PWM) Controller
中文描述: 降壓脈寬調(diào)制(PWM)控制器
文件頁數(shù): 6/10頁
文件大?。?/td> 100K
代理商: HIP6007
2-136
The over-current function will trip at a peak inductor current
(I
PEAK
) determined by:
where I
OCSET
is the internal OCSET current source (200
μ
A
- typical). The OC trip point varies mainly due to the
MOSFET’s r
DS(ON)
variations. To avoid over-current tripping
in the normal operating load range, find the R
OCSET
resistor
from the equation above with:
1. The maximum r
DS(ON)
at the highest junction tempera-
ture.
2. The minimum I
OCSET
from the specification table.
3. Determine
where
I is the output inductor ripple current.
For an equation for the ripple current see the section under
component guidelines titled ‘Output Inductor Selection’.
,
A small ceramic capacitor should be placed in parallel with
R
OCSET
to smooth the voltage across R
OCSET
in the
presence of switching noise on the input voltage.
Application Guidelines
Layout Considerations
As in any high frequency switching converter, layout is very
important. Switching current from one power device to
another can generate voltage transients across the
impedances of the interconnecting bond wires and circuit
traces. These interconnecting impedances should be
minimized by using wide, short printed circuit traces. The
critical components should be located as close together as
possible using ground plane construction or single point
grounding.
Figure 5 shows the critical power components of the
converter. To minimize the voltage overshoot the
interconnecting wires indicated by heavy lines should be
part of ground or power plane in a printed circuit board. The
components shown in Figure 6 should be located as close
together as possible. Please note that the capacitors C
IN
and C
O
each represent numerous physical capacitors.
Locate the HIP6007 within 3 inches of the MOSFETs, Q1.
The circuit traces for the MOSFETs’ gate and source
connections from the HIP6007 must be sized to handle up to
1A peak current.
Figure 6 shows the circuit traces that require additional
layout consideration. Use single point and ground plane
construction for the circuits shown. Minimize any leakage
current paths on the SS PIN and locate the capacitor, C
ss
close to the SS pin because the internal current source is
only 10
μ
A. Provide local V
CC
decoupling between VCC and
GND pins. Locate the capacitor, C
BOOT
as close as practical
to the BOOT and PHASE pins.
FIGURE 4. OVER-CURRENT OPERATION
O
S
0A
0V
TIME (20ms/DIV)
5A
10A
15A
2V
4V
I
PEAK
I
---------------------------------------------------
R
DS ON
)
=
I
PEAK
for I
PEAK
I
OUT MAX
(
)
I
(
)
2
+
>
FIGURE 5. PRINTED CIRCUIT BOARD
POWER AND GROUND PLANES OR ISLANDS
L
O
C
O
UGATE
PHASE
Q1
D2
V
IN
V
OUT
RETURN
HIP6007
C
IN
L
+12V
HIP6007
SS
GND
V
CC
BOOT
D1
L
O
C
O
V
OUT
L
Q1
D2
PHASE
FIGURE 6. PRINTED CIRCUIT BOARD
SMALL SIGNAL LAYOUT GUIDELINES
+V
IN
C
BOOT
C
VCC
C
SS
HIP6007
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