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參數(shù)資料
| 型號(hào)： | HIP0063AB |
| 廠商： | INTERSIL CORP |
| 元件分類： | 功率晶體管 |
| 英文描述： | Hex Low Side MOSFET Driver with Serial or Parallel Interface and Diagnostic Fault Control |
| 中文描述： | 0.0044 A 6 CHANNEL, BUF OR INV BASED MOSFET DRIVER, PDSO28 |
| 封裝： | PLASTIC, MS-013-AE, SOIC-28 |
| 文件頁數(shù)： | 5/8頁 |
| 文件大小： | 61K |
| 代理商： | HIP0063AB |
5
Specifications HIP0063
Serial Peripheral Interface Timing
(See Figure 4)
PARAMETERS
SYMBOL
TEST CONDITION
MIN
TYP
MAX
UNITS
Clock Operating Frequency
f
SCK
C
L
= 200pF
1.8
4
-
MHz
Clock Period
t
SCK
SCK = 0.8V to 0.8V
-
250
555
ns
Clock High Time
t
WH
SCK = 2V TO 2V; f
SCK
= 1.8MHz
-
100
248
ns
Clock Low Time
t
WL
SCK = 0.8V TO 0.8V; f
SCK
= 1.8MHz
-
100
248
ns
Falling Edge of CS to Rising Edge of SCK
t
LEAD
CS = 0.8V to SCK = 2V
-
150
200
ns
Falling Edge of SCK to Rising Edge of CS
t
LAG
SCK = 0.8V to CS = 2V
-
50
200
ns
SI to SCK Setup Time
t
SU2
SI = 0.8, 2V to SCK = 2V;
f
SCK
= 2.25MHz
-
25
55
ns
SI Hold After SCK Rise
t
H2
SCK = 2V to SI Hold
-
10
55
ns
Rise Time of Incoming Signals
t
rSI
C
L
= 200pF
-
-
120
ns
Fall Time of Incoming Signals
t
fSI
C
L
= 200pF
-
-
120
ns
SO Data Valid to Falling Edge of SCK
t
SU1
SO = 0.8, 2V to SCK = 0.8V; C
L
= 200pF
80
-
-
ns
Falling Edge of SCK to SO
t
H1
SO = 0.8, 2V to SCK = 0.8V; C
L
= 200pF
80
125
-
ns
Rise Time of SO
t
rSO
C
L
= 200pF
-
30
50
ns
Fall Time of SO
t
fSO
C
L
= 200pF
-
30
50
ns
Falling Edge of CS to SO Operational
(1k
Pulldown on SO Pin)
t
SOEN
CS = 0.8V to SO Low Impedance
-
150
300
ns
Rising Edge of CS to SO Three-State
(1k
Pulldown on SO Pin)
t
SODIS
CS = 2V to SO Three-State
-
150
200
ns
Rising Edge of SCK to SO (Data Valid)
t
VALID
C
L
= 200pF, 1.8MHz
-
-
172
ns
C
L
= 200pF, 2.25MHz
-
-
117
ns
FIGURE 4. TIMING DIAGRAM FOR THE HIP0063 SHOWING THE SPI BUS INPUT CONTROL SIGNALS
SCK
CS
SI
SO
MSB
LSB
1
2
X
LSB
t
LEAD
t
SOEN
LAST BIT
XMITTED
t
SU1
t
H1
t
VALID
t
WL
t
SCK
t
WH
t
SU2
t
H2
t
LAG
t
SODIS
(MSB = 0)
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