參數(shù)資料
型號: HIN232ACA
廠商: INTERSIL CORP
元件分類: Line Driver or Receiver
英文描述: DUAL LINE TRANSCEIVER, PDSO16
封裝: PLASTIC, MO-150AC, SSOP-16
文件頁數(shù): 9/12頁
文件大?。?/td> 144K
代理商: HIN232ACA
6
Transmitters
The transmitters are TTL/CMOS compatible inverters which
translate the inputs to RS-232 outputs. The input logic
threshold is about 26% of VCC, or 1.3V for VCC = 5V. A logic 1
at the input results in a voltage of between -5V and V- at the
output, and a logic 0 results in a voltage between +5V and (V+ -
0.6V). Each transmitter input has an internal 400k
pullup
resistor so any unused input can be left unconnected and its
output remains in its low state. The output voltage swing meets
the RS-232C specifications of
±5V minimum with the worst
case conditions of: all transmitters driving 3k
minimum load
impedance, VCC = 4.5V, and maximum allowable operating
temperature. The transmitters have an internally limited output
slew rate which is less than 30V/
s. The outputs are short
circuit protected and can be shorted to ground indefinitely. The
powered down output impedance is a minimum of 300
with
±2V applied to the outputs and VCC = 0V.
Receivers
The receiver inputs accept up to
±30V while presenting the
required 3k
to 7k input impedance even if the power is off
(VCC = 0V). The receivers have a typical input threshold of 1.3V
which is within the
±3V limits, known as the transition region, of
the RS-232 specifications. The receiver output is 0V to VCC.
The output will be low whenever the input is greater than 2.4V
and high whenever the input is floating or driven between +0.8V
and -30V. The receivers feature 0.5V hysteresis (except during
shutdown) to improve noise rejection.
Application Information
The HIN2XXA may be used for all RS-232 data terminal and
communication links. It is particularly useful in applications
where
±12V power supplies are not available for
conventional RS-232 interface circuits. The applications
presented represent typical interface congurations.
A simple duplex RS-232 port with CTS/RTS handshaking is
illustrated in Figure 7. Fixed output signals such as DTR
(data terminal ready) and DSRS (data signaling rate select)
is generated by driving them through a 5k
resistor
connected to V+.
In applications requiring four RS-232 inputs and outputs
(Figure 8), note that each circuit requires two charge pump
capacitors (C1 and C2) but can share common reservoir
capacitors (C3 and C4). The benet of sharing common
reservoir capacitors is the elimination of two capacitors and
the reduction of the charge pump source impedance which
effectively increases the output swing of the transmitters.
TOUT
V- < VTOUT < V+
300
400k
TXIN
GND < TXIN < VCC
V-
V+
VCC
FIGURE 4. TRANSMITTER
ROUT
GND < VROUT < VCC
5k
RXIN
-30V < RXIN < +30V
GND
VCC
FIGURE 5. RECEIVER
TIN
VOL
tPLH
tPHL
AVERAGE PROPAGATION DELAY =
tPHL + tPLH
2
OR
RIN
TOUT
OR
ROUT
FIGURE 6. PROPAGATION DELAY DEFINITION
-
+
-
+
-
+
CTR (20) DATA
TERMINAL READY
DSRS (24) DATA
SIGNALING RATE
RS-232
INPUTS AND OUTPUTS
TD (2) TRANSMIT DATA
RTS (4) REQUEST TO SEND
RD (3) RECEIVE DATA
CTS (5) CLEAR TO SEND
SIGNAL GROUND (7)
15
8
13
7
14
16
-
+
6
R2
R1
T2
T1
9
12
10
11
4
5
3
1
HIN232A
C1
0.1
F
C2
0.1
F
TD
RTS
RD
CTS
SELECT
+5V
INPUTS
OUTPUTS
TTL/CMOS
FIGURE 7. SIMPLE DUPLEX RS-232 PORT WITH CTS/RTS HANDSHAKING
HIN202A, HIN232A
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