參數(shù)資料
型號: HI5760IA
廠商: INTERSIL CORP
元件分類: DAC
英文描述: CONNECTOR ACCESSORY
中文描述: PARALLEL, WORD INPUT LOADING, 0.035 us SETTLING TIME, 10-BIT DAC, PDSO28
封裝: PLASTIC, MO-153-AE, TSSOP-28
文件頁數(shù): 16/18頁
文件大小: 172K
代理商: HI5760IA
16
Pin Descriptions
PIN NO.
PIN NAME
PIN DESCRIPTION
1-10
D9 (MSB) Through
D0 (LSB)
Digital Data Bit 9, (Most Significant Bit) through Digital Data Bit 0, (Least Significant Bit).
11-14
NC
No Connect. Recommend ground.
15
SLEEP
ControlPinforPower-Downmode.SleepModeisactivehigh;ConnecttogroundforNormalMode.Sleep
pin has internal 20
μ
A active pulldown current.
16
REFLO
Connect to analog ground to enable internal 1.2V reference or connect to AV
DD
to disable internal
reference.
17
REFIO
Reference voltage input if internal reference is disabled. Reference voltage output if internal reference is
enabled. Use 0.1
μ
F cap to ground when internal reference is enabled.
18
FSADJ
Full Scale Current Adjust. Use a resistor to ground to adjust full scale output current. Full Scale Output
Current = 32 x V
FSADJ
/R
SET
.
19
COMP1
For use in reducing bandwidth/noise. Recommended: connect 0.1
μ
F to AV
DD
.
20
ACOM
Analog Ground.
21
IOUTB
The complimentary current output of the device. Full scale output current is achieved when all input bits
are set to binary 0.
22
IOUTA
Current output of the device. Full scale output current is achieved when all input bits are set to binary 1.
23
NC
Internally connected to ACOM via a resistor. Recommend leave disconnected. Adding a capacitor to
ACOM for upward compatibility is valid. Grounding to ACOM is valid. (For upward compatibility to 12-bit
and 14-bit devices, pin 23 needs the ability to have a 0.1
μ
F capacitor to ACOM.)
24
AV
DD
Analog Supply (+3V to +5V).
25
NC
No Connect. (For upward compatibility to 12 and 14b devices, pin 25 needs to be grounded to ACOM.)
26
DCOM
Digital Ground.
27
DV
DD
Digital Supply (+3V to +5V).
28
CLK
Input for clock. Positive edge of clock latches data.
HI5760
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