3
Absolute Maximum Ratings
Thermal Information
V+ to V- . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .33V
Analog (VIN, VOUT) . . . . . . . . . . . . . . . . . . . . . . (V-) -2V to (V+) +2V
Digital Input Voltage:
TTL Levels Selected (VDD/LLS Pin = GND or Open)
VA0-1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -6V to +6V
VA2/SDS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . (V-) -2V to (V+) +2V
CMOS Levels Selected (VDD/LLS Pin = VDD)
VA0-2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -2V to (V+) +2V
Operating Conditions
Temperature Ranges
HI-518-8 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -55oC to 125oC
HI-518-5 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0oC to 75oC
Thermal Resistance (Typical, Note 2)
. . . . θJA (oC/W)
θJC (oC/W)
PDIP Package*. . . . . . . . . . . . . . . . . . .
90
N/A
CERDIP Package. . . . . . . . . . . . . . . . .
70
18
Maximum Junction Temperature
Ceramic Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 175oC
Plastic Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 150oC
Maximum Storage Temperature Range . . . . . . . . . . -65oC to 150oC
Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . 300oC
*Pb-free PDIPs can be used for through hole wave solder processing
only. They are not intended for use in Reflow solder processing
applications.
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTE:
2.
θJA is measured with the component mounted on an evaluation PC board in free air.
Electrical Specifications
Supplies = +15V, -15V; VAH (Logic Level High) = 2.4V, VAL (Logic Level Low) = 0.8V; VDD/LLS = GND
(Note 3), Unless Otherwise Specified
PARAMETER
TEST
CONDITIONS
TEMP
(oC)
-8
-5
UNITS
MIN
TYP
MAX
MIN
TYP
MAX
DYNAMIC CHARACTERISTICS
Access Time, tA
25
-
130
175
-
130
175
ns
Full
--
225
--
225
ns
Break-Before-Make Delay, tOPEN
25
10
20
-
10
20
-
ns
Enable Delay (ON), tON(EN)
25
-
120
175
120
175
ns
Enable Delay (OFF), tOFF(EN)
25
-
140
175
140
175
ns
Settling Time
To 0.1%
25
-
250
-
250
-
ns
To 0.01%
25
-
800
-
800
-
ns
Charge Injection Error
Note 6
25
-
25
-
25
mV
Off Isolation
Note 7
25
45
-
45
-
dB
Channel Input Capacitance, CS(OFF)
25
-
5
-
5
pF
Channel Output Capacitance, CD(OFF)
25
-
10
-
10
pF
Digital Input Capacitance, CA
25
-
5
-
5
pF
Input to Output Capacitance, CDS(OFF)
25
-0.02-
pF
DIGITAL INPUT CHARACTERISTICS
Input Low Threshold, VAL (TTL)
Note 3
Full
-
0.8
-
0.8
V
Input High Threshold, VAH (TTL)
Note 3
Full
2.4
-
2.4
-
V
Input Low Threshold, VAL (CMOS)
Note 3
Full
-
0.3VDD
-
0.3VDD
V
Input High Threshold, VAH (CMOS)
Note 3
Full
0.7VDD
-
0.7VDD
--
V
Input Leakage Current, IAH (High)
Full
-
1
-
1
A
Input Leakage Current, IAL (Low)
Full
-
20
-
20
A
ANALOG CHANNEL CHARACTERISTICS
Analog Signal Range, VIN
Note 4
Full
-14
-
+14
-15
-
+15
V
On Resistance, rON
Note 5
25
-
480
750
-
480
750
Full
-
1,000
-
1,000
Off Input Leakage Current, lS(OFF)
25
-0.01-
nA
Full
-
50
-
50
nA
Off Output Leakage Current, ID(OFF)
25
-
0.015
-
0.015
-
nA
Full
-
50
-
50
nA
On Channel Leakage Current, ID(ON)
25
-
0.015
-
0.015
-
nA
Full
-
50
-
50
nA
POWER SUPPLY CHARACTERISTICS
Power Dissipation, PD
Full
--
450
--
540
mW
HI-518