參數(shù)資料
型號: HI1179
廠商: Intersil Corporation
英文描述: 8-Bit, 35 MSPS, Video A/D Converter
中文描述: 8位,35 MSPS的,視頻的A / D轉(zhuǎn)換器
文件頁數(shù): 11/14頁
文件大?。?/td> 117K
代理商: HI1179
4-1120
function is enabled by tying CLE low. In this case a negative
going pulse is sent to the CLP pin. V
IN
will now be clamped
during the low period of the clamp pulse to the voltage on
the V
REF
pin. Figure 15 shows the HI1179 configured for
this mode of operation.The clamp pulse is latched by the
ADC sampling clock through an external latch. This is not
necessary to the operation of the clamp function but in video
applications, if this is not done, then a slight beat might be
generated as vertical sag according to the relation between
the sampling frequency and the clamp frequency. The pulse
width of the input clamp pulse will depend on the input
signal. For example, a 1
μ
s pulse width will allow the user to
clamp the back porch of an NTSC input signal to the
reference voltage, V
REF
.
The clamp can be disabled by tying CLE high and then the
HI1179 acts like a normal A/D converter, accepting a DC
coupled input. The Typical Application Schematic illustrates
the operation of HI1179 when the clamp function is not used.
Additional information on the HI1179 is available in
Application Note 9407, “Using the HI1176/HI1179 Evaluation
Board”.
Test Circuits
FIGURE 23. INTEGRAL AND DIFFERENTIAL NON-LINEARITY ERROR AND OFFSET VOLTAGE TEST CIRCUIT
FIGURE 24. MAXIMUM OPERATIONAL SPEED AND DIFFERENTIAL GAIN AND PHASE ERROR TEST CIRCUIT
-
+
V
IN
HI1179
DUT
8
CLK (35MHz)
A < B
COMPARATOR
A > B
A8
A1
A0
B8
B1
B0
“0”
“1”
8
S1
S2
-V
+V
S1: ON IF A < B
S2: ON IF A > B
BUFFER
DVM
CONTROLLER
8
TO
111 10
000 00
SIGNAL
SOURCE
NTSC
SG
(CW)
V
IN
8
8
SCOPE
VECTOR
620
DG
DP
ERROR RATE
SG
AMP
HI1179
DUT
ECL
TTL
D/A
10-BIT
-5.2V
CLK
1
2
1
2
HPF
COUNTER
620
-5.2V
ECL
TTL
f
C
-40
0
100
IRE
SYNC
BURST
0.6V
2.6V
40 IRE
MODULATION
0.6V
2.6V
f
C
-1kHz
HI20201
HI1179
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