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參數(shù)資料
| 型號： | HI1178JCQ |
| 廠商： | Intersil |
| 文件頁數(shù)： | 7/11頁 |
| 文件大?。?/td> | 0K |
| 描述： | CONV D/A 8BIT TRPL 40MHZ 48-PQFP |
| 標準包裝： | 600 |
| 位數(shù)： | 8 |
| 數(shù)據(jù)接口： | 并聯(lián) |
| 轉換器數(shù)目： | 3 |
| 電壓電源： | 模擬和數(shù)字 |
| 功率耗散（最大）： | 240mW |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 48-BQFP |
| 供應商設備封裝： | 48-MQFP（12x12） |
| 包裝： | 托盤 |
| 輸出數(shù)目和類型： | 6 電流，單極 |
| 采樣率（每秒）： | 40M |
5
Absolute Maximum Ratings TA = 25oC
Thermal Information
Supply Voltage (VDD) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .7V
Input Voltage (VIN). . . . . . . . . . . . . . . . . . . . . . . . . . . . . VDD to VSS
Output Current (IOUT) . . . . . . . . . . . . . . . . . . . . . . . . . . VDD to VSS
Digital Input Voltage (CLK) . . . . . . . . . . . . . . . . . . . . . 0mA to 15mA
(Every Each Channel)
Operating Conditions
Temperature Range (TOPR) . . . . . . . . . . . . . . . . . . . -40
oC to 85oC
Supply Voltage
AVDD, AVSS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4.75V to 5.25V
DVDD, DVSS . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4.75V to 5.25V
Reference Input Voltage (VREF) . . . . . . . . . . . . . . . . . . . . . . . . . .2V
Clock Pulse Width
tPW1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12.5ns (Min)
tPW0 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12.5ns (Min)
Thermal Resistance (Typical, Note 1)
θJA (oC/W)
MQFP Package . . . . . . . . . . . . . . . . . . . . . . . . . . . .
94
Maximum Junction Temperature (Plastic Package) . . . . . . . . 150oC
Maximum Storage Temperature Range (TSTG) . . . -65
oC to 150oC
Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . . 300oC
(MQFP - Lead Tips Only)
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTE:
1.
θJA is measured with the component mounted on an evaluation PC board in free air.
Electrical Specifications
fCLK = 40MHz, VDD = 5V, ROUT = 200, VREF = 2.0V, TA = 25
oC
PARAMETER
SYMBOL
TEST CONDITIONS
MIN
TYP
MAX
UNITS
Resolution
n
-8
-
bit
Maximum Conversion Speed
fMAX
40
-
MSPS
Linearity Error
EL
-2.5
-
2.5
LSB
Differential Linearity Error
ED
-0.3
-
0.3
LSB
Full Scale Output Voltage
VFS
1.8
2.0
2.2
V
Full Scale Output Ratio (Note 1)
FSR
01.5
3
%
Full Scale Output Current
IFS
-10
15
mA
Offset Output Voltage
VOS
--
1
mV
Power Supply Current
IDD
14.3MHz, at Color Bar Data Input
-
48
mA
Digital Input
Current
H Level
IIH
--
5
A
L Level
IIL
-5
-
A
Set Up Time
tS
5-
-
ns
Hold Time
tH
10
-
ns
Propagation Delay Time
tPD
-10
-
ns
Glitch Energy
GE
ROUT = 75
-30
-
pV/s
Crosstalk
CT
1MHz Sine Wave Output
-
57
-
dB
NOTE:
1. Full scale output ratio =
x 100(%)
Full Scale Voltage of Channel
Average of the Full Scale Voltage of the Channels
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HI1178
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