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參數(shù)資料
| 型號(hào)： | HI1-565AJD-5 |
| 廠商： | Intersil |
| 文件頁數(shù)： | 2/9頁 |
| 文件大?。?/td> | 0K |
| 描述： | CONV D/A 12BIT 6.7MHZ 24-DIP |
| 標(biāo)準(zhǔn)包裝： | 165 |
| 位數(shù)： | 12 |
| 數(shù)據(jù)接口： | 并聯(lián) |
| 轉(zhuǎn)換器數(shù)目： | 1 |
| 電壓電源： | 雙 ± |
| 功率耗散（最大）： | 250mW |
| 工作溫度： | 0°C ~ 75°C |
| 安裝類型： | 通孔 |
| 封裝/外殼： | 24-CDIP（0.600"，15.24mm） |
| 供應(yīng)商設(shè)備封裝： | 24-DIP |
| 包裝： | 管件 |
| 輸出數(shù)目和類型： | 1 電流，單極；1 電流，雙極 |
| 采樣率（每秒）： | 6.7M |
2
Absolute Maximum Ratings
Thermal Information
VCC to Power GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0V to +18V
VEE to Power GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0V to -18V
Voltage on DAC Output (Pin 9) . . . . . . . . . . . . . . . . . . . -3V to +12V
Digital Inputs (Pins 13-24) to Power GND . . . . . . . . . . . -1V to +7.0V
REF In to REF GND. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
±12V
Bipolar Offset to REF GND . . . . . . . . . . . . . . . . . . . . . . . . . . .
±12V
10V Span R to REF GND . . . . . . . . . . . . . . . . . . . . . . . . . . . .
±12V
20V Span R to REF GND . . . . . . . . . . . . . . . . . . . . . . . . . . . .
±24V
REF Out . . . . . . . . . . . . . . . . . . . . . . Indefinite Short to Power GND,
Momentary Short to VCC
Operating Conditions
Temperature Ranges
HI1-565AX-2, /883 . . . . . . . . . . . . . . . . . . . . . . . . -55oC to 125oC
HI1-565AX-5. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0oC to 75oC
Thermal Resistance (Typical, Note 1)
θJA (oC/W) θJC (oC/W)
SBDIP Package . . . . . . . . . . . . . . . . . .
60
20
Maximum Package Power Dissipation
SBDIP Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 500mW
Maximum Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . 175oC
Maximum Storage Temperature Range . . . . . . . . . -65oC to 150oC
Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . . 300oC
Die Characteristics
Transistor Count . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 200
Process . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Bipolar-DI
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTE:
1.
θJA is measured with the component mounted on an evaluation PC board in free air.
Electrical Specifications
TA = 25
oC, V
CC = +15V, VEE = -15V, Unless Otherwise Specified
PARAMETER
TEST CONDITIONS
HI-565AJ, HI-565AS
HI-565AT
UNITS
MIN
TYP
MAX
MIN
TYP
MAX
DATA INPUTS (Pins 13 to 24)
Input Voltage Bit ON Logic “1”
(TMlN to TMAX)
+2.0
-
+5.5
+2.0
-
+5.5
V
Input Voltage Bit OFF Logic “0”
(TMlN to TMAX)
-
-+0.8
-
-+0.8
V
Logic Current Bit ON Logic “1”
(TMlN to TMAX)
-
0.01
+1.0
-
0.01
+1.0
A
Logic Current Bit OFF Logic “0”
(TMlN to TMAX)
-
-2.0
-20
-
-2.0
-20
A
Resolution
(Note 2)
12
-
12
-
Bits
OUTPUT
Unipolar Current
(All Bits ON)
-1.6
-2.0
-2.4
-1.6
-2.0
-2.4
mA
Bipolar Current
(All Bits ON or OFF)
±0.8
±1.0
±1.2
±0.8
±1.0
±1.2
mA
Resistance
(Exclusive of Span
Resistors) (Note 2)
1.8K
2.5K
3.2K
1.8K
2.5K
3.2K
Unipolar Offset (25oC)
-0.05
0.01
0.05
-0.05
0.01
0.05
% of FS
-0.07
0.01
0.07
-0.07
0.01
0.07
% of FS
Bipolar Offset (25oC)
-0.15
0.05
0.15
-0.1
0.05
0.1
% of FS
Bipolar Offset (TMlN to TMAX)
/883 Versions Only
(Figure 2, R3 = 50)
-0.25
0.05
0.25
-0.2
0.05
0.2
% of FS
Capacitance
-
20
-
20
-
pF
Compliance Voltage
(TMIN to TMAX)(Note 2)
-1.5
-
+10
-1.5
-
+10
V
ACCURACY (Error Relative to Full Scale)
Integral Non-Linearity
(25oC)
End Point Method
-
±0.25
(0.006)
±0.50
(0.012)
-
±0.12
(0.003)
±0.25
(0.006)
LSB
% of FS
Integral Non-Linearity
/883 Versions Only
(TMIN to TMAX)
End Point Method
-
±0.50
(0.012)
±0.75
(0.018)
-
±0.25
(0.006)
±0.50
(0.012)
LSB
% of FS
Differential Non-Linearity
25oC-
±0.50
±0.75
-
±0.25
±0.50
LSB
Differential Non-Linearity
TMIN to TMAX
MONOTONICITY GUARANTEED
HI-565A
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