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參數(shù)資料
| 型號(hào)： | HI-8482CT |
| 廠商： | HOLT INTEGRATED CIRCUITS INC |
| 元件分類： | 通用總線功能 |
| 英文描述： | ARINC 429 DUAL LINE RECEIVER |
| 中文描述： | DUAL LINE RECEIVER, CDIP20 |
| 封裝： | SIDE BRAZED, CERAMIC, DIP-20 |
| 文件頁(yè)數(shù)： | 6/10頁(yè) |
| 文件大小： | 676K |
| 代理商： | HI-8482CT |
ADDITIONAL HI-8482 PIN CONFIGURATIONS
(All 20-Pin Package Configurations)
18 - IN1A
17 - CAP1B
16 - IN1B
15 - OUT1A
14 - GND
IN2B - 4
OUT2B - 5
IN2A - 6
CAP2A - 7
OUT2A - 8
18 - IN1A
17 - CAP1B
16 - IN1B
15 - OUT1A
14 - GND
IN2B - 4
OUT2B - 5
IN2A - 6
CAP2A - 7
OUT2A - 8
20 - TESTB
19 - CAP1A
18 - IN1A
17 - CAP1B
16 - IN1B
15 - OUT1A
14 - GND
13 - N/C
12 - OUT1B
11 - +V
S
-V
- 1
TESTA - 2
CAP2B - 3
IN2B - 4
OUT2B - 5
IN2A - 6
CAP2A - 7
OUT2A - 8
+V
- 9
N/C - 10
S
L
20 - TESTB
19 - CAP1A
18 - IN1A
17 - CAP1B
16 - IN1B
15 - OUT1A
14 - GND
13 - N/C
12 - OUT1B
11 - +V
S
-V
- 1
TESTA - 2
CAP2B - 3
IN2B - 4
OUT2B - 5
IN2A - 6
CAP2A - 7
OUT2A - 8
+V
- 9
N/C - 10
S
L
HI-8482D
HI-8482DT
20-PIN
CERDIP
HI-8482C
HI-8482CT
HI-8482CM-01
20-PIN
CERAMIC
SIDE-BRAZED
DIP
HI-8482U
HI-8482UT
20-PIN
J-LEAD
CERQUAD
HI-8482S
HI-8482ST
HI-8482SM-01
20-PIN
CERAMIC LCC
HI-8482
HOLT INTEGRATED CIRCUITS
6
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| HI-8482D | ARINC 429 DUAL LINE RECEIVER |
| HI-8482DT | 384 MCELL 3 VOLT ZERO POWER ISP CPLD - NOT RECOMMENDED for NEW DESIGN |
| HI-8482J | 384 MCELL 3 VOLT ZERO POWER ISP CPLD - NOT RECOMMENDED for NEW DESIGN |
| HI-8482PSI | ARINC 429 DUAL LINE RECEIVER |
| HI-8482PST | ARINC 429 DUAL LINE RECEIVER |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| HI8482D | 制造商:Holt Integrated Circuits 功能描述:Line Receiver 2RX 20-Pin CDIP |
| HI-8482D | 制造商:Holt Integrated Circuits 功能描述:Line Receiver 2RX 20-Pin CDIP |
| HI-8482DT | 制造商:Holt Integrated Circuits 功能描述:Line Receiver 2RX 20-Pin CDIP |
| HI8482J | 制造商:Holt Integrated Circuits 功能描述:Line Receiver 2RX 20-Pin PLCC |
| HI-8482J | 制造商:Holt Integrated Circuits 功能描述:Line Receiver 2RX 20-Pin PLCC |
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