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參數(shù)資料
| 型號(hào)： | HEF40192BT |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 通用總線功能 |
| 英文描述： | 4-bit up/down decade counter |
| 中文描述： | 4000/14000/40000 SERIES, SYN POSITIVE EDGE TRIGGERED 4-BIT BIDIRECTIONAL DECADE COUNTER, PDSO16 |
| 封裝： | PLASTIC, SOT-108, SO-14 |
| 文件頁(yè)數(shù)： | 2/9頁(yè) |
| 文件大?。?/td> | 129K |
| 代理商： | HEF40192BT |
January 1995
2
Philips Semiconductors
Product specification
4-bit up/down decade counter
HEF40192B
MSI
DESCRIPTION
The HEF40192B is a 4-bit synchronous up/down decade
counter. The counter has a count-up clock input (CP
U
), a
count-down clock input (CP
D
), an asynchronous parallel
load input (PL), four parallel data inputs (P
0
to P
3
), an
asynchronous master reset input (MR), four counter
outputs (O
0
to O
3
), an active LOW terminal count-up
(carry) output (TC
U
) and an active LOW terminal
count-down (borrow) output (TC
D
).
The counter outputs change state on the LOW to HIGH
transition of either clock input. However, for correct
counting, both clock inputs cannot be LOW
simultaneously. The outputs TC
U
and TC
D
are normally
HIGH. When the circuit has reached the maximum count
state of ‘9’, the next HIGH to LOW transition of CP
U
will
cause TC
U
to go LOW. TC
U
will stay LOW until CP
U
goes
HIGH again. Likewise, output TC
D
will go LOW when the
circuit is in the zero state and CP
D
goes LOW. When PL is
LOW, the information on P
0
to P
3
is asynchronously
loaded into the counter. A HIGH on MR resets the counter
independent of all other input conditions. The counter
stages are of a static toggle type flip-flop.
Fig.1 Functional diagram.
HEF40192BP(N):
16-lead DIL; plastic
(SOT38-1)
16-lead DIL; ceramic (cerdip)
(SOT74)
16-lead SO; plastic
(SOT109-1)
HEF40192BD(F):
HEF40192BT(D):
( ): Package Designator North America
Fig.2 Pinning diagram.
PINNING
PL
P
0
to P
3
CP
U
parallel load input (active LOW)
parallel data inputs
count-up clock pulse input (LOW to HIGH,
edge-triggered)
count-down clock pulse input (LOW to
HIGH, edge-triggered)
master reset input (asynchronous)
buffered terminal count-up (carry) output
(active LOW)
buffered terminal count-down
(borrow) output (active LOW)
buffered counter outputs
CP
D
MR
TC
U
TC
D
O
0
to O
3
FAMILY DATA, I
DD
LIMITS category MSI
See Family Specifications
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| HEF40192BTD | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Synchronous Up/Down Counter |
| HEF40192BTD-T | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Synchronous Up/Down Counter |
| HEF40193B | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:4-bit up/down binary counter |
| HEF40193BD | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:4-bit up/down binary counter |
| HEF40193BF | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:4-bit up/down binary counter |
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