參數(shù)資料
型號(hào): HDSP-2179
英文描述: Eight Character 5.0 mm (0.2 inch) Glass/Ceramic Intelligent 5 x 7 Alphanumeric Displays for Military Applications(軍用的八字符5.0 mm (0.2英寸)玻璃/陶瓷智能 5 x 7文字?jǐn)?shù)字顯示器)
中文描述: 八字5.0毫米(0.2英寸)玻璃/陶瓷智能5 × 7的軍事應(yīng)用字母數(shù)字顯示器(軍用的八字符5.0毫米(0.2英寸)玻璃/陶瓷智能5 × 7文字?jǐn)?shù)字顯示器)
文件頁(yè)數(shù): 12/16頁(yè)
文件大?。?/td> 319K
代理商: HDSP-2179
12
UDC RAM and UDC Address
Register
Figure 3 shows the logic levels
needed to access the UDC RAM
and the UDC Address Register.
The UDC Address Register is
eight bits wide. The lower four
bits (D
0
-D
3
) are used to select
one of the 16 UDC locations. The
upper four bits (D
4
-D
7
) are not
used. Once the UDC address has
been stored in the UDC Address
Register, the UDC RAM can be
accessed.
To completely specify a 5 x 7
character requires eight write
cycles. One cycle is used to store
the UDC RAM address in the UDC
Address Register. Seven cycles
are used to store dot data in the
UDC RAM. Data is entered by
rows. One cycle is needed to
access each row. Figure 4 shows
the organization of a UDC
character assuming the symbol to
be stored is an “F.” A
0
-A
2
are used
to select the row to be accessed
and D
0
-D
4
are used to transmit
the row dot data. The upper three
bits (D
5
-D
7
) are ignored. D
0
(least significant bit) corresponds
to the right most column of the 5
x 7 matrix and D
4
(most
significant bit) corresponds to
the left most column of the 5 x 7
matrix.
Flash RAM
Figure 5 shows the logic levels
needed to access the Flash RAM.
The Flash RAM has one bit
associated with each location of
the Character RAM. The Flash
input is used to select the Flash
RAM. Address lines A
3
-A
4
are
ignored. Address lines A
0
-A
2
are
used to select the location in the
Flash RAM to store the attribute.
D
0
is used to store or remove the
flash attribute. D
0
= “1” stores
the attribute and D
0
= “0”
removes the attribute.
When the attribute is enabled
through bit 3 of the Control Word
and a "1" is stored in the Flash
RAM, the corresponding character
will flash at approximately 2 Hz.
The actual rate is dependent on
the clock frequency. For an
external clock the flash rate can
be calculated by dividing the
clock frequency by 28,672.
Figure 4. Data to Load “F” into the UDC RAM.
Figure 3. Logic Levels to Access a UDC Character.
相關(guān)PDF資料
PDF描述
HDSP-2301 Four Character 5.0 mm (0.20 inch) 5 x 7 Alphanumeric Displays(四字符5.0 mm (0.20英寸) 5 x 7數(shù)字文字顯示器)
HDSP-2302 Four Character 5.0 mm (0.20 inch) 5 x 7 Alphanumeric Displays(四字符5.0 mm (0.20英寸) 5 x 7數(shù)字文字顯示器)
HDSP-2303 Four Character 5.0 mm (0.20 inch) 5 x 7 Alphanumeric Displays(四字符5.0 mm (0.20英寸) 5 x 7數(shù)字文字顯示器)
HDSP-2351 Extended Temperature Four Character 5.0 mm (0.20 Inch) 5 x 7 Alphanumeric Display for Sunlight Viewable Applications(應(yīng)用于日光觀察的擴(kuò)展溫度四字符5.0 mm (0.20 英寸) 5 x 7 文字?jǐn)?shù)字顯示器)
HDSP-2352 Extended Temperature Four Character 5.0 mm (0.20 Inch) 5 x 7 Alphanumeric Display for Sunlight Viewable Applications(應(yīng)用于日光觀察的擴(kuò)展溫度四字符5.0 mm (0.20 英寸) 5 x 7 文字?jǐn)?shù)字顯示器)
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