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參數(shù)資料
| 型號： | HDD32M72B9 |
| 廠商： | Hanbit Electronics Co.,Ltd. |
| 英文描述： | DDR SDRAM Module 256Mbyte (32Mx72bit), based on32Mx8,4Banks, 8K Ref., ECC Unbuffered SO-DIMM |
| 中文描述： | 256MB的DDR SDRAM內(nèi)存模塊（32Mx72bit）根據(jù)on32Mx8，4Banks，8K的參考。，ECC無緩沖的SO - DIMM |
| 文件頁數(shù)： | 6/12頁 |
| 文件大?。?/td> | 210K |
| 代理商： | HDD32M72B9 |
HANBit
HDD32M72B9
URL : www.hbe.co.kr 6 HANBit Electronics Co.,Ltd.
REV 1.0 (July. 2003)
DC CHARACTERISTICS
(Recommended operating condition unless otherwise noted, V
DD
= 2.5V, T =25
°
C)
Symbol
16B(DDR333@CL=2.5)
13A(DDR266@CL=2)
13B(DDR266@CL=2.5)
Unit
Notes
IDD0
810
720
720
mA
IDD1
1080
990
990
mA
IDD2P
27
27
27
mA
IDD2F
225
180
180
mA
IDD2Q
80
165
165
mA
IDD3P
315
270
270
mA
IDD3N
495
405
405
mA
IDD4R
1,530
1,260
1,260
mA
IDD4W
1,530
1,260
1,260
mA
IDD5
1,620
1,480
1,480
mA
Normal
27
27
27
mA
IDD6
Low power
14
14
14
mA
Optional
IDD7A
2,920
2,520
2,520
mA
Module IDD was calculated on the basis of component I DD and can be differently measured according to DQ loading cap.
AC OPERATING CONDITIONS
PARAMETER
STMBOL
MIN
MAX
UNIT
NOTE
Input High (Logic 1) Voltage, DQ, DQS and DM signals
V
IH
(AC)
VREF + 0.31
3
Input Low (Logic 0) Voltage, DQ, DQS and DM signals.
V
IL
(AC)
VREF - 0.31
V
3
Input Differential Voltage, CK and CK inputs
V
ID
(AC)
0.7
VDDQ+0.6
V
1
Input Crossing Point Voltage, CK and CK inputs
Notes:
1.
VID is the magnitude of the difference between the input level on CK and the input on CK*.
2.
The value of V
IX
is expected to equal 0.5* V
DDQ
of the transmitting device and must track variations in the DC level of
the same
3.
These parameters should be tested at the pim on actual components and may be checked at either the pin or the
pad in simula-tion. the AC and DC input specificatims are refation to a Vref envelope that has been bandwidth limited
20MHz.
AC OPERATING TEST CONDITIONS
V
IX
(AC)
0.5*VDDQ-0.2
0.5*VDDQ+0.2
V
2
PARAMETER
VALUE
UNIT
NOTE
Input reference voltage for Clock
0.5 * V
DDQ
V
Input signal maximum peak swing
1.5
V
Input signal minimum slew rate
VREF+0.31/VREF-0.31
V
Input Levels(V
IH
/V
IL
)
V
REF
+0.35/V
REF
V
Input timing measurement reference level
V
REF
V
Output timing measurement reference level
V
TT
V
Output load condition
See Load Circuit
V
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| HDD32M72B9-13A | DDR SDRAM Module 256Mbyte (32Mx72bit), based on32Mx8,4Banks, 8K Ref., ECC Unbuffered SO-DIMM |
| HDD32M72B9-13B | DDR SDRAM Module 256Mbyte (32Mx72bit), based on32Mx8,4Banks, 8K Ref., ECC Unbuffered SO-DIMM |
| HDD32M72B9-16B | DDR SDRAM Module 256Mbyte (32Mx72bit), based on32Mx8,4Banks, 8K Ref., ECC Unbuffered SO-DIMM |
| HDD32M72D9RPW | DDR SDRAM Module 256Mbyte (32Mx72bit), based on 32Mx8, 4Banks 8K Ref., 184Pin-DIMM with PLL & Register |
| HDD32M72D9RPW-10A | DDR SDRAM Module 256Mbyte (32Mx72bit), based on 32Mx8, 4Banks 8K Ref., 184Pin-DIMM with PLL & Register |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| HDD32M72B9-13A | 制造商:HANBIT 制造商全稱:Hanbit Electronics Co.,Ltd 功能描述:DDR SDRAM Module 256Mbyte (32Mx72bit), based on32Mx8,4Banks, 8K Ref., ECC Unbuffered SO-DIMM |
| HDD32M72B9-13B | 制造商:HANBIT 制造商全稱:Hanbit Electronics Co.,Ltd 功能描述:DDR SDRAM Module 256Mbyte (32Mx72bit), based on32Mx8,4Banks, 8K Ref., ECC Unbuffered SO-DIMM |
| HDD32M72B9-16B | 制造商:HANBIT 制造商全稱:Hanbit Electronics Co.,Ltd 功能描述:DDR SDRAM Module 256Mbyte (32Mx72bit), based on32Mx8,4Banks, 8K Ref., ECC Unbuffered SO-DIMM |
| HDD32M72D18RPW | 制造商:HANBIT 制造商全稱:Hanbit Electronics Co.,Ltd 功能描述:DDR SDRAM Module 256Mbyte (32Mx72bit), based on 16Mx8, 4Banks, 4K Ref., 184Pin-DIMM with PLL & Register |
| HDD32M72D9RPW | 制造商:HANBIT 制造商全稱:Hanbit Electronics Co.,Ltd 功能描述:DDR SDRAM Module 256Mbyte (32Mx72bit), based on 32Mx8, 4Banks 8K Ref., 184Pin-DIMM with PLL & Register |
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