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參數(shù)資料
| 型號： | HDD16M72D9RPW-13A |
| 廠商： | Hanbit Electronics Co.,Ltd. |
| 英文描述： | DDR SDRAM Module 128Mbyte (16Mx72bit), based on 16Mx8, 4Banks 4K Ref., 184Pin-DIMM with PLL & Register |
| 中文描述： | DDR SDRAM內(nèi)存模塊128Mbyte（16Mx72bit），基于對16Mx8，4Banks 4K的參考。，184Pin - DIMM內(nèi)存的鎖相環(huán) |
| 文件頁數(shù)： | 6/10頁 |
| 文件大小： | 349K |
| 代理商： | HDD16M72D9RPW-13A |
HANBit
HDD16M72D9RPW
URL : www.hbe.co.kr 6 HANBit Electronics Co.,Ltd.
REV 1.0 (November.2002)
INPUT/OUTPUT Capacitance (V
DD
= 2.5V, V
DDQ
= 2.5V, T
A
= 25
°
C, F = 1MHZ)
DESCRIPTION
SYMBOL
MIN
MAX
UNITS
Input Capacitance(A0
~ A12, BA0
~ BA1,RAS,CAS, WE )
C
IN1
49
57
pF
Input Capacitance(CKE0)
C
IN2
42
50
pF
Input Capacitance( CS0)
C
IN3
42
50
pF
Input Capacitance( CLK0, CLK
1
,CLK
2
)
C
IN4
22
25
pF
Data & DQS input/output Capacitance(DQ0~DQ63)
C
OUT1
6
8
pF
Input Capacitance(DM0~DM8)
C
IN5
6
8
pF
AC Operating Conditions
PARAMETER/ Condition
STMBOL
MIN
MAX
UNIT
NOTE
Input High (Logic 1) Voltage, DQ, DQS and DM signals
V
IH
(AC)
V
IL
(AC)
V
ID
(AC)
V
IX
(AC)
V
REF
+ 0.31
3
Input Low (Logic 0) Voltage, DQ, DQS and DM signals.
V
REF
- 0.31
V
DDQ
+0.6
0.5*V
DDQ
+0.2
V
3
Input Differential Voltage, CK and CK inputs
0.7
V
1
Input Crossing Point Voltage, CK and CK inputs
Note
1. V
is the magnitude of the difference between the input level on CK and the input on CK.
2. The value of V
is expected to equal 0.5* V
of the transmitting device and must track variations in the DC level of the same.
3. These parameters should be tested at the pim on actual components and may be checked at either the pin or the pad in simulation.
the AC and DC input specificatims are refation to a V
REF
envelope that has been bandwidth limited 20MHz.
AC Operating TEST Conditions
0.5*V
DDQ
-0.2
V
2
PARAMETER
VALUE
UNIT
NOTE
Input reference voltage for Clock
0.5 * V
DDQ
1.5
V
Input signal maximum peak swing
V
Input signal minimum slew rate
0.5
V/ns
Input Levels(V
IH
/V
IL
)
V
REF
+0.31/V
REF
-0.31
V
REF
V
TT
See Load Circuit
V
Input timing measurement reference level
V
Output timing measurement reference level
V
Output load condition
V
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| HDD16M72D9RPW-13B | DDR SDRAM Module 128Mbyte (16Mx72bit), based on 16Mx8, 4Banks 4K Ref., 184Pin-DIMM with PLL & Register |
| HDD16M72D9W | DDR SDRAM Module 128Mbyte (16Mx72bit), based on 16Mx8, 4Banks 4K Ref., 184Pin-DIMM with Unbuffered ECC |
| HDD16M72D9W-10A | DDR SDRAM Module 128Mbyte (16Mx72bit), based on 16Mx8, 4Banks 4K Ref., 184Pin-DIMM with Unbuffered ECC |
| HDD16M72D9W-13A | DDR SDRAM Module 128Mbyte (16Mx72bit), based on 16Mx8, 4Banks 4K Ref., 184Pin-DIMM with Unbuffered ECC |
| HDD16M72D9W-13B | DDR SDRAM Module 128Mbyte (16Mx72bit), based on 16Mx8, 4Banks 4K Ref., 184Pin-DIMM with Unbuffered ECC |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| HDD16M72D9RPW-13B | 制造商:HANBIT 制造商全稱:Hanbit Electronics Co.,Ltd 功能描述:DDR SDRAM Module 128Mbyte (16Mx72bit), based on 16Mx8, 4Banks 4K Ref., 184Pin-DIMM with PLL & Register |
| HDD16M72D9W | 制造商:HANBIT 制造商全稱:Hanbit Electronics Co.,Ltd 功能描述:DDR SDRAM Module 128Mbyte (16Mx72bit), based on 16Mx8, 4Banks 4K Ref., 184Pin-DIMM with Unbuffered ECC |
| HDD16M72D9W-10A | 制造商:HANBIT 制造商全稱:Hanbit Electronics Co.,Ltd 功能描述:DDR SDRAM Module 128Mbyte (16Mx72bit), based on 16Mx8, 4Banks 4K Ref., 184Pin-DIMM with Unbuffered ECC |
| HDD16M72D9W-13A | 制造商:HANBIT 制造商全稱:Hanbit Electronics Co.,Ltd 功能描述:DDR SDRAM Module 128Mbyte (16Mx72bit), based on 16Mx8, 4Banks 4K Ref., 184Pin-DIMM with Unbuffered ECC |
| HDD16M72D9W-13B | 制造商:HANBIT 制造商全稱:Hanbit Electronics Co.,Ltd 功能描述:DDR SDRAM Module 128Mbyte (16Mx72bit), based on 16Mx8, 4Banks 4K Ref., 184Pin-DIMM with Unbuffered ECC |
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