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參數(shù)資料
| 型號： | HD74ALVC1G80 |
| 廠商： | Hitachi,Ltd. |
| 英文描述： | Single Positive Edge-triggered D-type Flip Flop |
| 中文描述： | 單上升沿觸發(fā)的D型拖鞋 |
| 文件頁數(shù)： | 1/11頁 |
| 文件大?。?/td> | 96K |
| 代理商： | HD74ALVC1G80 |
HD74ALVC1G80
Single Positive Edge-triggered D-type Flip Flop
ADE-205-638A (Z)
Rev.1
August 2001
Description
The HD74ALVC1G80 has D-type flip flop in a 5 pin package. The input data is transferred to the output at
the rising edge of clock pulse CLK. Low voltage and high speed operation is suitable for the battery
powered products (e.g., notebook computers), and the low power consumption extends the battery life.
Features
The basic gate function is lined up as hitachi uni logic series.
Supplied on emboss taping for high speed automatic mounting.
Supply voltage range : 1.2 to 3.6 V
Operating temperature range :
40 to +85°C
All inputs V
IH
(Max.) = 3.6 V (@V
CC
= 0 V to 3.6 V)
All outputs V
O
(Max.) = 3.6 V (@V
CC
= 0 V)
Output current
±
2 mA (@V
CC
= 1.2 V)
±
4 mA (@V
CC
= 1.4 V to 1.6 V)
±
6 mA (@V
CC
= 1.65 V to 1.95 V)
±
18 mA (@V
CC
= 2.3 V to 2.7 V)
±
24 mA (@V
CC
= 3.0 V to 3.6 V)
Package type
Package type
Package code
Package suffix
Taping code
VSON-5 pin
TNP-5D
VS
E (3,000 pcs / Reel)
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|---|---|
| HD74ALVC1G07 | Single Buffer / Driver with Open Drain |
| HD74ALVC1G125 | Bus Buffer Gate with 3-state Output |
| HD74ALVC1G86 | Quadruple 1-Of-2 Data Selectors/Multiplexers 20-LCCC -55 to 125 |
| HD74ALVC1G02 | Dual 1-Of-4 Data Selectors/Multiplexers 16-CDIP -55 to 125 |
| HD74ALVC1G02VSE | 2-input NOR Gate |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| HD74ALVC1G80VSE | 制造商:RENESAS 制造商全稱:Renesas Technology Corp 功能描述:Single Positive Edge-triggered D-type Flip Flop |
| HD74ALVC1G86 | 制造商:HITACHI 制造商全稱:Hitachi Semiconductor 功能描述:2-input Exclusive-OR Gate |
| HD74ALVC1G86VSE | 制造商:RENESAS 制造商全稱:Renesas Technology Corp 功能描述:2-input Exclusive-OR Gate |
| HD74ALVC2G00 | 制造商:RENESAS 制造商全稱:Renesas Technology Corp 功能描述:Dual 2-input NAND Gates |
| HD74ALVC2G00USE | 制造商:RENESAS 制造商全稱:Renesas Technology Corp 功能描述:Dual 2-input NAND Gates |
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