參數(shù)資料
型號(hào): HD40L4816
廠商: Hitachi,Ltd.
英文描述: 4-Bit Single-Chip Microcomputer(4位單片微計(jì)算機(jī))
中文描述: 4位單片機(jī)(4位單片微計(jì)算機(jī))
文件頁數(shù): 47/98頁
文件大?。?/td> 621K
代理商: HD40L4816
HD404818 Series
47
Timers
The MCU provides prescalers S and W (each with a different input clock source), and three timer/ counters
(timers A, B, and C). Figures 25, 26 and 27 show their diagrams.
Prescaler S:
The input to prescaler S is the system clock signal. The prescaler is initialized to $000 by
MCU reset, and starts to count up with the system clock signal as soon as the RESET input goes low. The
prescaler keeps counting up except at MCU reset and in the stop and watch modes. The prescaler provides
input clock signals to timers A to C and the transmit clock of the serial interface. They can be selected by
timer mode registers A (TMA), B (TMB), C (TMC), and the serial mode register (SMR), respectively.
Prescaler W:
The input to prescaler W is a clock which divides the X1 input clock by 8. The output of
prescaler W is available as an input clock for timer A by controlling timer mode register A (TMA).
Timer A Operation:
After timer A is initialized to $00 by MCU reset, it counts up at every clock input
signal. When the next clock signal is applied after timer A has counted up to $FF, timer A is set to $00
again, and an overflow output is generated. This sets the timer A interrupt request flag (IFTA: $001, bit 2)
to 1. Therefore, timer A can function as an interval timer periodically generating overflow output at every
256th clock signal input (figure 25).
To use timer A as a watch time base, set TMA3 to 1. Timer counter A receives prescaler W output, and
timer A generates interrupts with accurate timing (reference clock = 32-kHz crystal oscil lator). When
using timer A as a watch time base, prescaler W and the timer counter can be initialized to $0 by setting
timer mode register A.
The clock input signals to timer A are selected by timer mode register A (TMA: $008).
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