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參數(shù)資料
| 型號(hào)： | HD40A4358 |
| 廠商： | Hitachi,Ltd. |
| 英文描述： | 4-bit HMCS400-Series microcomputer |
| 中文描述： | 4位HMCS400系列微機(jī) |
| 文件頁數(shù)： | 76/100頁 |
| 文件大小： | 398K |
| 代理商： | HD40A4358 |
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HD404358 Series
76
Bit
Initial value
Read/Write
Bit name
3
0
R
ADRL3
2
0
R
ADRL2
0
0
R
ADRL0
1
0
R
ADRL1
A/D data register (lower digit) (ADRL: $017)
Figure 69 A/D Data Register Lower Digit (ADRL)
Bit
Initial value
Read/Write
Bit name
A/D data register (upper digit) (ADRU: $018)
2
0
R
ADRU2
1
0
R
ADRU1
0
0
R
ADRU0
3
1
R
ADRU3
Figure 70 A/D Data Register Upper Digit (ADRU)
Notes on Usage
Use the SEM or SEMD instruction for writing to the A/D start flag (ADSF)
Do not write to the A/D start flag during A/D conversion
Data in the A/D data register during A/D conversion is undefined
Since the operation of the A/D converter is based on the clock from the system oscillator, the A/D
converter does not operate in stop mode. In addition, to save power while in these modes, all current
flowing through the converter’s resistance ladder is cut off.
If the power supply for the A/D converter is to be different from V
CC
, connect a 0.1-
μ
F bypass capacitor
between the AV
CC
and AV
SS
pins. (However, this is not necessary when the AV
CC
pin is directly
connected to the V
CC
pin.)
The contents of the A/D data register are not guaranteed during A/D conversion. To ensure that the A/D
converter oparates stably, do not execute port output instructions during A/D convention.
The port data register (PDR) is initialized to 1 by an MCU reset. At this time, if pull-up MOS is selected
as active by bit 3 of the miscellaneous register (MIS3), the port will be pulled up to V
CC
. When using a
shared R port/analog input pin as an input pin, clear PDR to 0. Otherwise, if pull-up MOS is selected by
MIS3 and PDR is set to 1, a pin selected by A/D mode register 1 or 2 (AMR1 or AMR2) as an analog
pin will remain pulled up (figure 71).
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