HD404358 Series
62
Pin Setting:
The R0
0
/
SCK
pin is controlled by writing data to the serial mode register (SMR: $005). The
R0
1
/SI and R0
2
/SO pins are controlled by writing data to port mode register A (PMRA: $004). Refer to the
following Registers for Serial Interface section for details.
Transmit Clock Source Setting:
The transmit clock source is set by writing data to the serial mode
register (SMR: $005) and port mode register C (PMRC: $025). Refer to the following Registers for Serial
Interface section for details.
Data Setting:
Transmit data is set by writing data to the serial data register (SRL: $006, SRU, $007).
Receive data is obtained by reading the contents of the serial data register. The serial data is shifted by the
transmit clock and is input from or output to an external system.
The output level of the SO pin is invalid until the first data is output after MCU reset, or until the output
level control in idle states is performed.
Transfer Control:
The serial interface is activated by the STS instruction. The octal counter is reset to 000
by this instruction, and it increments at the rising edge of the transmit clock. When the eighth transmit
clock signal is input or when serial transmission/receive is discontinued, the octal counter is reset to 000,
the serial interrupt request flag (IFS: $003, bit 2) is set, and the transfer stops.
When the prescaler output is selected as the transmit clock, the transmit clock frequency is selected as 4t
cyc
to 8192t
cyc
by setting bits 0 to 2 (SMR0– SMR2) of serial mode register (SMR: $005) and bit 0 (PMRC0)
of port mode register C (PMRC: $025) as listed in table 28.
Table 28
Serial Transmit Clock (Prescaler Output)
PMRC
SMR
Bit 0
Bit 2
Bit 1
Bit 0
Prescaler Division Ratio
Transmit Clock Frequency
0
0
0
0
÷
2048
÷
512
÷
128
÷
32
÷
8
÷
2
÷
4096
÷
1024
÷
256
÷
64
÷
16
÷
4
4096t
cyc
1024t
cyc
256t
cyc
64t
cyc
16t
cyc
4t
cyc
8192t
cyc
2048t
cyc
512t
cyc
128t
cyc
32t
cyc
8t
cyc
1
1
0
1
1
0
0
1
1
0
0
0
1
1
0
1
1
0
0
1