參數(shù)資料
型號(hào): HD4074449
廠商: Hitachi,Ltd.
英文描述: 4-bit HMCS400-Series microcomputer(4位單片微計(jì)算機(jī))
中文描述: 4位HMCS400系列微機(jī)(4位單片微計(jì)算機(jī))
文件頁(yè)數(shù): 17/123頁(yè)
文件大?。?/td> 726K
代理商: HD4074449
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HD404449 Series
17
Item
Abbr.
Status After
Cancellation of Stop
Mode by
STOPC
Input
Status After
Cancellation of Stop
Mode by MCU Reset
Status After all Other
Types of Reset
Carry flag
(CA)
Pre-stop-mode values are not guaranteed;
values must be initialized by program
Pre-stop-mode values
are not guaranteed;
values must be
initialized by program
Accumulator
(A)
B register
(B)
W register
(W)
X/SPX register
(X/SPX)
Y/SPY register
(Y/SPY)
Serial data register (SRL, SRU)
A/D data register
(ADRL,
ADRU)
RAM
Pre-stop-mode values are retained
RAM enable flag
(RAME)
1
0
0
Port mode register
1 bit 2
(PMRC12)
Pre-stop-mode values
are retained
0
0
System clock
select register bit 3
(SSR3)
Interrupts
The MCU has 11 interrupt sources: four external signals (
INT
0
,
INT
1
,
INT
2
, INT
3
), four timer/counters
(timers A, B, C, and D), two serial interfaces (serial 1, serial 2), and A/D converter.
An interrupt request flag (IF), interrupt mask (IM), and vector address are provided for each interrupt
source, and an interrupt enable flag (IE) controls the entire interrupt process.
Some vector addresses are shared by two different interrupts. They are timer B and INT
2
, timer C and
INT
3
, timer D and A/D converter, and serial interface 1 and serial interface 2. So the type of request that
has occurred must be checked at the beginning of interrupt processing.
Interrupt Control Bits and Interrupt Processing:
Locations $000 to $003 and $022 to $023 in RAM are
reserved for the interrupt control bits which can be accessed by RAM bit manipulation instructions.
The interrupt request flag (IF) cannot be set by software. MCU reset initializes the interrupt enable flag
(IE) and the IF to 0 and the interrupt mask (IM) to 1.
A block diagram of the interrupt control circuit is shown in figure 9, interrupt priorities and vector
addresses are listed in table 2, and interrupt processing conditions for the 11 interrupt sources are listed in
table 3.
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