參數(shù)資料
型號(hào): HD404448
廠商: Hitachi,Ltd.
英文描述: 4-bit HMCS400-Series microcomputer(4位單片微計(jì)算機(jī))
中文描述: 4位HMCS400系列微機(jī)(4位單片微計(jì)算機(jī))
文件頁(yè)數(shù): 32/123頁(yè)
文件大小: 726K
代理商: HD404448
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HD404449 Series
32
Active mode
Watch mode
Active mode
Oscillation
stabilization period
Interrupt strobe
INT
Interrupt request
generation
(During the transition
from watch mode to
active mode only)
0
T
T
t
RC
Tx
T:
t :
Interrupt frame length
Oscillation stabilization period
Figure 17 Interrupt Frame
Subactive Mode:
The OSC
1
and OSC
2
oscillator stops and the MCU operates with a clock generated by
the X1 and X2 oscillator. In this mode, functions other than A/D conversion operate. However, because
the operating clock is slow, the power dissipation becomes low, next to watch mode.
The CPU instruction execution speed can be selected as 244
μ
s or 122
μ
s by setting bit 2 (SSR2) of the
system clock select register (SSR: $029). Note that the SSR2 value must be changed in active mode. If the
value is changed in subactive mode, the MCU may malfunction.
When the STOP or SBY instruction is executed in subactive mode, the MCU enters either watch or active
mode, depending on the statuses of the low speed on flag (LSON: $020, bit 0) and the direct transfer on
flag (DTON: $020, bit 3).
Subactive mode is an optional function that the user must specify on the function option list.
Interrupt Frame:
In watch and subactive modes,
CLK
is applied to timer A and the
INT
0
circuit. Prescaler
W and timer A operate as the time-base and generate the timing clock for the interrupt frame. Three
interrupt frame lengths (T) can be selected by setting the miscellaneous register (MIS: $00C) (figure 18).
In watch and subactive modes, the timer-A/
INT
0
interrupt is generated synchronously with the interrupt
frame. The interrupt request is generated synchronously with the interrupt strobe timing except during
transition to active mode. The falling edge of the
INT
0
signal is input asynchronously with the interrupt
frame timing, but it is regarded as input synchronously with the second interrupt strobe clock after the
falling edge. An overflow and interrupt request in timer A is generated synchronously with the interrupt
strobe timing.
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