參數(shù)資料
型號(hào): HC4053
廠商: System Logic Semiconductor Co., Ltd.
英文描述: IC-VLTG REG 125V-1A
中文描述: 模擬多路復(fù)用器/解復(fù)用器
文件頁數(shù): 2/8頁
文件大?。?/td> 87K
代理商: HC4053
SL74HC4053
S ystem Logic
Semiconductor
SLS
MAXIMUM RATINGS
*
Symbol
Parameter
Value
Unit
V
CC
Positive DC Supply Voltage (Referenced to GND)
(Referenced to V
EE
)
-0.5 to +7.0
-0.5 to +14.0
V
V
EE
Negative DC Supply Voltage (Referenced to GND)
-7.0 to +0.5
V
V
IS
Analog Input Voltage
V
EE
- 0.5 to V
CC
+0.5
V
V
IN
Digital Input Voltage (Referenced to GND)
-1.5 to V
CC
+1.5
±
25
V
I
DC Input Current Into or Out of Any Pin
mA
P
D
Power Dissipation in Still Air, Plastic DIP+
SOIC Package+
750
500
mW
Tstg
Storage Temperature
-65 to +150
°
C
°
C
T
L
Lead Temperature, 1 mm from Case for 10 Seconds
(Plastic DIP or SOIC Package)
260
*
Maximum Ratings are those values beyond which damage to the device may occur.
Functional operation should be restricted to the Recommended Operating Conditions.
+Derating - Plastic DIP: - 10 mW/
°
C from 65
°
to 125
°
C
SOIC Package: : - 7 mW/
°
C from 65
°
to 125
°
C
RECOMMENDED OPERATING CONDITIONS
Symbol
Parameter
Min
Max
Unit
V
CC
Positive Supply Voltage (Referenced to GND)
(Referenced to V
EE
)
2.0
2.0
6.0
12.0
V
V
EE
Negative DC Supply Voltage (Referenced to GND)
- 6.0
GND
V
V
IS
Analog Input Voltage
V
EE
V
CC
V
V
IN
Digital Input Voltage (Referenced to GND)
GND
V
CC
V
V
IO
*
Static or Dynamic Voltage Across Switch
-
1.2
V
T
A
Operating Temperature, All Package Types
-55
+125
°
C
t
r
, t
f
Input Rise and Fall Time (Channel Select
or Enable Inputs)
V
CC
=2.0 V
V
CC
=4.5 V
V
CC
=6.0 V
0
0
0
1000
500
400
ns
*
For voltage drops across the switch greater than 1.2 V (switch on), excessive V
current may be drawn;
i. e., the current out of the switch may contain both V
and switch input components. The reliability of the
device will be unaffected unless the Maximum Ratings are exceeded.
This device contains protection circuitry to guard against damage due to high static voltages or electric
fields. However, precautions must be taken to avoid applications of any voltage higher than maximum rated
voltages to this high-impedance circuit. For proper operation, V
IN
and V
OUT
should be constrained to the range
indicated in the Recommended Operating Conditions..
Unused digital input pins must always be tied to an appropriate logic voltage level (e.g., either GND or V
CC
).
Unused Analog I/O pins may be left open or terminated.
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