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參數(shù)資料
| 型號： | HC109 |
| 廠商： | System Logic Semiconductor Co., Ltd. |
| 英文描述： | Dual J-K Flip-Flop with Set and Reset |
| 中文描述： | 雙JK觸發(fā)器的設(shè)置和復(fù)位 |
| 文件頁數(shù)： | 1/5頁 |
| 文件大小： | 47K |
| 代理商： | HC109 |
SL74HC109
S ystem Logic
Semiconductor
SLS
Dual J-K Flip-Flop with Set and Reset
High-Performance Silicon-Gate CMOS
The SL74HC109 is identical in pinout to the LS/ALS109. The device
inputs are compatible with standard CMOS outputs, with pullup
resistors, they are compatible with LS/ALSTTL outputs.
This device consists of two J-K flip-flops with individual set, reset,
and clock inputs. Changes at the inputs are reflected at the outputs
with the next low-to-high transition of the clock. Both Q to Q outputs
are available from each flip-flop.
Outputs Directly Interface to CMOS, NMOS, and TTL
Operating Voltage Range: 2.0 to 6.0 V
Low Input Current: 1.0
μ
A
High Noise Immunity Characteristic of CMOS Devices
ORDERING INFORMATION
SL74HC109N Plastic
SL74HC109D SOIC
T
A
= -55
°
to 125
°
C for all packages
PIN ASSIGNMENT
FUNCTION TABLE
Inputs
Outputs
Set
Reset
Clock
J
K
Q
Q
L
H
X
X
X
H
L
H
L
X
X
X
L
H
L
L
X
X
X
H
*
H
*
H
H
L
L
L
H
H
H
H
L
Toggle
H
H
L
H
No Change
H
H
H
H
H
L
H
X = Don’t care
*
Both outputs will remain high as long as Set and
Reset are low, but the output states are
unpredictable if Set and Reset go high
simultaneously.
H
L
X
X
No Change
LOGIC DIAGRAM
PIN 16=V
CC
PIN 8 = GND
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| HC-109 | 制造商:Thomas & Betts 功能描述: |
| HC-1-1/4 | 制造商:Cooper Bussmann 功能描述:BUSS FUSEHOLDER - Bulk |
| HC1-100 | 制造商:COOPER BUSSMANN 功能描述:Ind High Current Power Wirewound 10uH 15% 300KHz Ferrite 12.79A T/R |
| HC1-100-R | 功能描述:固定電感器 10uH 5.3A 5.7mOhms RoHS:否 制造商:AVX 電感:10 uH 容差:20 % 最大直流電流:1 A 最大直流電阻:0.075 Ohms 工作溫度范圍:- 40 C to + 85 C 自諧振頻率:38 MHz Q 最小值:40 尺寸:4.45 mm W x 6.6 mm L x 2.92 mm H 屏蔽:Shielded 端接類型:SMD/SMT 封裝 / 箱體:6.6 mm x 4.45 mm |
| HC1-100-R | 制造商:Cooper Bussmann / Coiltronics 功能描述:POWER INDUCTOR |
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