參數(shù)資料
型號(hào): HA16129
廠商: Hitachi,Ltd.
元件分類(lèi): FPGA
英文描述: 1500000 SYSTEM GATE 1.5 VOLT FPGA
中文描述: 單看門(mén)狗定時(shí)器
文件頁(yè)數(shù): 7/24頁(yè)
文件大小: 135K
代理商: HA16129
HA16129FPJ
7
t
ON
t
ON
is the time from the point the
NMI
output goes high when power is first applied to the point the
RES
output goes low. t
ON
is the time for the potential of the C
R
pin to reach VthHcr1 from 0V.
tr
The time tr is the fixed delay time between the point the
NMI
output goes from low to high after the power-
supply voltage comes up to the point
RES
goes from low to high. The time tr is the time for the CRES pin
potential to fall from the high voltage (about 1.9V) to Vthcres.
t
RES
The time t
RES
is the fixed delay time between the point the
NMI
output goes from high to low when the
power-supply voltage falls to the point
RES
goes from high to low. The time t
RES
is the time for the C
RES
pin
potential to rise from 0V to Vthcres.
WDT Function
This function determines whether the microprocessor is operating normally or has entered a runaway state
by monitoring the duty or frequency of the P-RUN signal. When this function recognizes a runaway state,
it outputs a reset pulse from the
RES
pin and sets the OUTE pin to low from high. It holds the
RES
and
OUTE pins fixed at high as long as it recognizes normal microprocessor operation.
In this function, the potential of the Cf capacitor is controlled by the P-RUN signal. This Cf pin potential
charges the capacitor C
R
that controls the reset pulse to be between VthLcf and VthHcf. The judgment as
to whether or not the microprocessor is operating normally, is determined by the balance between the
charge and discharge voltage on the capacitor C
R
at this time.
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