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參數(shù)資料
| 型號(hào)： | HA118144AF |
| 廠商： | Electronic Theatre Controls, Inc. |
| 英文描述： | Video Camera CDS/AGC IC |
| 中文描述： | 攝像機(jī)的CDS / AGC的集成電路 |
| 文件頁數(shù)： | 18/23頁 |
| 文件大?。?/td> | 107K |
| 代理商： | HA118144AF |
Operation
CDS (correlated double sampling) circuit
A CCD image sensor alternately outputs a
noise segment (the A period signal) and a
signal segment (the B period signal) that
includes noise. Since the main noise generated
by the image sensor is low frequency noise,
and that noise is added to the signal, this noise
is a factor in S/N ratio degradation.
The CDS circuit removes the low frequency
noise by first clamping the image sensor output
signal noise segment (the A period signal) to a
fixed voltage, and then replacing the noise
segment with the signal segment by sampling
and holding the signal segment (B period),
which includes noise. Thus the CDS circuit
generates a continuous signal, and consists of a
clamping circuit, and sample and hold circuit,
and inverting amplifier. (See figures 2 and 3.)
— Clamp circuit (CLAMP)
This circuit removes low frequency noise by
clamping the input signal 1 noise segment
(A period) to a fixed voltage using the SP1
sample/hold pulse, and supplies its output
signal to the sample and hold circuit. (See
figures 2 and 3 4 .)
— Sample and hold circuit (S/H)
This is a circuit that samples and holds the
signal segment, and uses the SP2 sample/hold
pulse to sample the signal segment (B period)
and replace the noise segment with the signal
segment to generate a continuous signal. (See
figures 2 and 3 5 .)
— Following the inverting amplifier, the signal is
supplied to the gain select circuit.
Input
CLAMP
S/H
Output
SP1
SP2
AMP
1
2
4
3
5
Figure 2 CDS Circuit
18
HA118144AF
HA118144AF
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