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參數(shù)資料
| 型號： | GS9090 |
| 廠商： | Gennum Corporation |
| 英文描述： | GS9090 GenLINX-R III 270Mb/s Deserializer for SDI and DVB-ASI |
| 中文描述： | GS9090 GenLINX - R的第三270Mb / s的SDI和DVB解串器，意大利航天局 |
| 文件頁數(shù)： | 10/70頁 |
| 文件大?。?/td> | 696K |
| 代理商： | GS9090 |
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GS9090 Data Sheet
28201 - 1
July 2005
10 of 70
46
LOCKED
Synchronous
with PCLK
Output
STATUS SIGNAL OUTPUT
Signal levels are LVCMOS / LVTTL compatible.
The LOCKED signal will be HIGH whenever the device has correctly
received and locked to SMPTE compliant data in SMPTE mode or
DVB-ASI compliant data in DVB-ASI mode, or when the reclocker has
achieved lock in Data-Through mode.
It will be LOW otherwise. When the signal is LOW, all digital output
signals will be forced to logic LOW levels.
47
DVB_ASI
Non
Synchronous
Input /
Output
CONTROL SIGNAL INPUT / STATUS SIGNAL OUTPUT
Signal levels are LVCMOS / LVTTL compatible.
This pin is an input set by the application layer in Manual mode, and an
output set by the device in Auto mode.
Auto Mode (AUTO/MAN = HIGH):
The DVB_ASI signal will be HIGH only when the device has locked to a
DVB-ASI compliant data stream. It will be LOW otherwise.
Manual Mode (AUTO/MAN = LOW):
When the application layer sets this pin HIGH, the device will be
configured to operate in DVB-ASI mode. The SMPTE_BYPASS pin will
be ignored.
When set LOW, the device will not support the decoding or word
alignment of received DVB-ASI data.
49
SMPTE_BYPASS
Non
Synchronous
Input /
Output
CONTROL SIGNAL INPUT / STATUS SIGNAL OUTPUT
Signal levels are LVCMOS / LVTTL compatible.
This pin is an input set by the application layer in Manual mode, and an
output set by the device in Auto mode.
Auto Mode (AUTO/MAN = HIGH):
The SMPTE_BYPASS signal will be HIGH only when the device has
locked to a SMPTE compliant data stream. It will be LOW otherwise.
When the signal is LOW, no I/O processing features are available.
Manual Mode (AUTO/MAN = LOW):
When the application layer sets this pin HIGH in conjunction with
DVB_ASI = LOW, the device will be configured to operate in SMPTE
mode. All I/O processing features may be enabled in this mode.
When the SMPTE_BYPASS pin is set LOW, the device will not support
the descrambling, decoding, or word alignment of received SMPTE
data. No I/O processing features will be available.
50
AUTO/MAN
Non
Synchronous
Input
CONTROL SIGNAL INPUT
Signal levels are LVCMOS / LVTTL compatible.
When set HIGH, the GS9090 will operate in Auto mode. The DVB_ASI
and SMPTE_BYPASS pins become output status signals set by the
device. In this mode, the GS9090 will automatically detect, reclock,
deserialize, and process SMPTE or DVB-ASI compliant input data.
When set LOW, the GS9090 will operate in Manual mode. The
DVB_ASI and SMPTE_BYPASS pins become input control signals. In
this mode, the application layer must set these two external pins for the
correct reception of either SMPTE or DVB-ASI data. Manual mode also
supports the reclocking and deserializing of data not conforming to
SMPTE or DVB-ASI streams.
Table 1-1: Pin Descriptions (Continued)
Pin
Number
Name
Timing
Type
Description
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| GS9090-CNE3 | GS9090 GenLINX-R III 270Mb/s Deserializer for SDI and DVB-ASI |
| GS9092A | GS9092A GenLINX-R III 270Mb/s Serializer for SDI and DVB-ASI |
| GS9092ACNE3 | GS9092A GenLINX-R III 270Mb/s Serializer for SDI and DVB-ASI |
| GS9092 | GS9092 GenLINX-R III 270Mb/s Serializer for SDI and DVB-ASI |
| GS9092-CNE3 | GS9092 GenLINX-R III 270Mb/s Serializer for SDI and DVB-ASI |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| GS9090A | 制造商:GENNUM 制造商全稱:GENNUM 功能描述:GS9090A GenLINX-R III 270Mb/s Deserializer for SDI |
| GS9090A_10 | 制造商:GENNUM 制造商全稱:GENNUM 功能描述:GenLINX III 270Mb/s Deserializer |
| GS9090ACNE3 | 制造商:Semtech Corporation 功能描述:270Mb/s Deserializer 56-Pin QFN EP 制造商:Semtech Corporation 功能描述:270Mb/s Deserializer for SDI & ASI |
| GS9090B | 制造商:GENNUM 制造商全稱:GENNUM 功能描述:GenLINX III 270Mb/s Deserializer for SDI |
| GS9090B_10 | 制造商:GENNUM 制造商全稱:GENNUM 功能描述:GenLINX III 270Mb/s Deserializer for SDI |
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