參數(shù)資料
型號: GS881E36AT-250T
廠商: GSI TECHNOLOGY
元件分類: DRAM
英文描述: 512K x 18, 256K x 36 9Mb Synchronous Burst SRAMs
中文描述: 256K X 36 CACHE SRAM, 5.5 ns, PQFP100
封裝: TQFP-100
文件頁數(shù): 24/37頁
文件大?。?/td> 662K
代理商: GS881E36AT-250T
GS881E18/36AT-250/225/200/166/150/133
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
Rev: 1.03 11/2004
16/29
2001, GSI Technology
Notes:
1.
2.
These parameters are sampled and are not 100% tested
ZZ is an asynchronous signal. However, In order to be recognized on any given clock cycle, ZZ must meet the specified setup and hold
times as specified above.
AC Electrical Characteristics
Parameter
Symbol
-250
-225
-200
-166
-150
-133
Unit
Min
Max
Min
Max
Min
Max
Min
Max
Min
Max
Min
Max
Pipeline
Clock Cycle Time
tKC
4.0
4.4
5.0
6.0
6.7
7.5
ns
Clock to Output Valid
tKQ
2.5
2.7
3.0
3.4
3.8
4.0
ns
Clock to Output Invalid
tKQX
1.5
1.5
1.5
1.5
1.5
1.5
ns
Clock to Output in Low-Z
tLZ
1
1.5
1.5
1.5
1.5
1.5
1.5
ns
Setup time
tS
1.2
1.3
1.4
1.5
1.5
1.5
ns
Hold time
tH
0.2
0.3
0.4
0.5
0.5
0.5
ns
Flow
Through
Clock Cycle Time
tKC
5.5
6.0
6.5
7.0
7.5
8.5
ns
Clock to Output Valid
tKQ
5.5
6.0
6.5
7.0
7.5
8.5
ns
Clock to Output Invalid
tKQX
3.0
3.0
3.0
3.0
3.0
3.0
ns
Clock to Output in Low-Z
tLZ
1
3.0
3.0
3.0
3.0
3.0
3.0
ns
Setup time
tS
1.5
1.5
1.5
1.5
1.5
1.5
ns
Hold time
tH
0.5
0.5
0.5
0.5
0.5
0.5
ns
Clock HIGH Time
tKH
1.3
1.3
1.3
1.3
1.5
1.7
ns
Clock LOW Time
tKL
1.5
1.5
1.5
1.5
1.7
2
ns
Clock to Output in
High-Z
tHZ
1
1.5
2.3
1.5
2.5
1.5
3.0
1.5
3.0
1.5
3.0
1.5
3.0
ns
G to Output Valid
tOE
2.3
2.5
3.2
3.5
3.8
4.0
ns
G to output in Low-Z
tOLZ
1
0
0
0
0
0
0
ns
G to output in High-Z
tOHZ
1
2.3
2.5
3.0
3.0
3.0
3.0
ns
ZZ setup time
tZZS
2
5
5
5
5
5
5
ns
ZZ hold time
tZZH
2
1
1
1
1
1
1
ns
ZZ recovery
tZZR
20
20
20
20
20
20
ns
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