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參數(shù)資料
| 型號： | GS880Z18AT-166I |
| 廠商： | Electronic Theatre Controls, Inc. |
| 英文描述： | 9Mb Pipelined and Flow Through Synchronous NBT SRAM |
| 中文描述： | 9MB的流水線和流量，通過同步唑的SRAM |
| 文件頁數(shù)： | 8/25頁 |
| 文件大?。?/td> | 753K |
| 代理商： | GS880Z18AT-166I |
Rev: 1.02 9/2002
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
8/25
2001, Giga Semiconductor, Inc.
GS880Z18/36AT-250/225/200/166/150/133
Pipeline and Flow Through Read Write Control State Diagram
Deselect
New Read
New Write
Burst Read
Burst Write
W
R
B
R
B
W
D
D
B
B
W
R
D
B
W
R
D
D
Current State (n)
Next State (n+1)
Transition
Input Command Code
Key
Notes:
1. The Hold command (CKE Low) is not
shown because it prevents any state change.
2. W, R, B and D represent input command
codes ,as indicated in the Synchronous Truth Table.
Clock (CK)
Command
Current State
Next State
n
n+1
n+2
n+3
Current State and Next State Definition for
Pipeline and Flow Through Read/Write Control State Diagram
W
R
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| GS880Z18AT-200 | 9Mb Pipelined and Flow Through Synchronous NBT SRAM |
| GS880Z18AT-200I | 9Mb Pipelined and Flow Through Synchronous NBT SRAM |
| GS880Z36AT-133 | 9Mb Pipelined and Flow Through Synchronous NBT SRAM |
| GS88136 | 8Mb（256K x 36Bit)ByteSafe Synchronous Burst SRAM(8M位（256K x 36位）ByteSafe同步靜態(tài)RAM（帶2位脈沖地址計數(shù)器）) |
| GS88118 | 8Mb（512K x 18Bit) ByteSafe Synchronous Burst SRAM(8M位（512K x 18位）ByteSafe同步靜態(tài)RAM（帶2位脈沖地址計數(shù)器）) |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| GS880Z18AT-200 | 制造商:GSI 制造商全稱:GSI Technology 功能描述:9Mb Pipelined and Flow Through Synchronous NBT SRAM |
| GS880Z18AT-200I | 制造商:GSI 制造商全稱:GSI Technology 功能描述:9Mb Pipelined and Flow Through Synchronous NBT SRAM |
| GS880Z18AT-225 | 制造商:GSI 制造商全稱:GSI Technology 功能描述:9Mb Pipelined and Flow Through Synchronous NBT SRAM |
| GS880Z18AT-225I | 制造商:GSI 制造商全稱:GSI Technology 功能描述:9Mb Pipelined and Flow Through Synchronous NBT SRAM |
| GS880Z18AT-250 | 制造商:GSI 制造商全稱:GSI Technology 功能描述:9Mb Pipelined and Flow Through Synchronous NBT SRAM |
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